Course detail

Logical Circuits and Systems

FEKT-KLOSAcad. year: 2018/2019

Not applicable.

Learning outcomes of the course unit

Not applicable.

Prerequisites

Not applicable.

Co-requisites

Not applicable.

Recommended optional programme components

Not applicable.

Recommended or required reading

Frištacký N.: Logické systémy, SNTL, Praha, 1986 (CS)
Kolouch, J.: Programovatelné logické obvody - Přednášky [Skriptum FEKT VUT v Brně] Brno 2005 (CS)
Pinker, J. Poupa, M: Číslicové systémy a jazyk VHDL. 2006, ISBN 80-730-0195-5 (CS)

Planned learning activities and teaching methods

Not applicable.

Assesment methods and criteria linked to learning outcomes

Not applicable.

Language of instruction

Czech

Work placements

Not applicable.

Aims

Not applicable.

Classification of course in study plans

  • Programme EEKR-BK Bachelor's

    branch BK-AMT , 2. year of study, winter semester, 6 credits, compulsory

  • Programme EEKR-CZV lifelong learning

    branch ET-CZV , 1. year of study, winter semester, 6 credits, compulsory

Type of course unit

 

Lecture

26 hours, optionally

Teacher / Lecturer

Laboratory exercise

39 hours, compulsory

Teacher / Lecturer