Detail publikace

A 0.3-V 98-dB Rail-to-Rail OTA in 0.18 um CMOS

Originální název

A 0.3-V 98-dB Rail-to-Rail OTA in 0.18 um CMOS

Anglický název

A 0.3-V 98-dB Rail-to-Rail OTA in 0.18 um CMOS

Jazyk

en

Originální abstrakt

A new solution for an ultra-low-voltage, ultra-low-power operational transconductance amplifier (OTA) is presented in the paper. The design exploits a three-stage structure with a Reversed Miller Compensation Scheme, where the input stage is based on a non-tailed bulk-driven differential pair. Optimization of the structure for very low supply voltage is discussed. The resulting amplifier outperforms other ultra-low-voltage OTAs in terms of a DC voltage gain and power efficiency, expressed by standard figures of merit. Experimental verification using a 0.18 mu m CMOS technology, with supply voltage of 0.3-V, showed a dissipation power of 13 nW, a DC voltage gain of 98 dB, a gain-bandwidth product of 3.1 kHz and an average slew-rate of 9.1 V/ms at 30 pF load capacitance. The experimental results agree well with simulations.

Anglický abstrakt

A new solution for an ultra-low-voltage, ultra-low-power operational transconductance amplifier (OTA) is presented in the paper. The design exploits a three-stage structure with a Reversed Miller Compensation Scheme, where the input stage is based on a non-tailed bulk-driven differential pair. Optimization of the structure for very low supply voltage is discussed. The resulting amplifier outperforms other ultra-low-voltage OTAs in terms of a DC voltage gain and power efficiency, expressed by standard figures of merit. Experimental verification using a 0.18 mu m CMOS technology, with supply voltage of 0.3-V, showed a dissipation power of 13 nW, a DC voltage gain of 98 dB, a gain-bandwidth product of 3.1 kHz and an average slew-rate of 9.1 V/ms at 30 pF load capacitance. The experimental results agree well with simulations.

Plný text v Digitální knihovně

BibTex


@article{BUT163742,
  author="Fabian {Khateb}",
  title="A 0.3-V 98-dB Rail-to-Rail OTA in 0.18 um CMOS",
  annote="A new solution for an ultra-low-voltage, ultra-low-power operational transconductance amplifier (OTA) is presented in the paper. The design exploits a three-stage structure with a Reversed Miller Compensation Scheme, where the input stage is based on a non-tailed bulk-driven differential pair. Optimization of the structure for very low supply voltage is discussed. The resulting amplifier outperforms other ultra-low-voltage OTAs in terms of a DC voltage gain and power efficiency, expressed by standard figures of merit. Experimental verification using a 0.18 mu m CMOS technology, with supply voltage of 0.3-V, showed a dissipation power of 13 nW, a DC voltage gain of 98 dB, a gain-bandwidth product of 3.1 kHz and an average slew-rate of 9.1 V/ms at 30 pF load capacitance. The experimental results agree well with simulations.",
  address="IEEE",
  chapter="163742",
  doi="10.1109/ACCESS.2020.2972067",
  howpublished="print",
  institution="IEEE",
  number="1, IF: 3.745",
  volume="8",
  year="2020",
  month="february",
  pages="27459--27467",
  publisher="IEEE",
  type="journal article in Web of Science"
}