Detail publikace

A Framework for Optimizing a Processor to Selected Application

PODIVÍNSKÝ, J. ČEKAN, O. KRČMA, M. BURGET, R. HRUŠKA, T. KOTÁSEK, Z.

Originální název

A Framework for Optimizing a Processor to Selected Application

Anglický název

A Framework for Optimizing a Processor to Selected Application

Jazyk

en

Originální abstrakt

A processor plays the main role in almost every electronics system. The use of a general purpose processor may not be profitable for a specific application, because the processor is designed for a wide set of applications. Application Specific Instruction-set Processors (ASIPs) are today applied in specific cases, where one application or a certain group of applications is performed. This paper focuses on automatic optimization of an ASIP for a given application through checking its possible configurations of key parameters (number of registers, size of caches, instruction set modification, etc.). The paper also presents designed framework which is able to optimize the given application in terms of speed, area or power consumption. The framework allows to use various optimization methods. For the processor modification, the Codasip Studio tool is used. It allows to generate all tools needed for compilation, simulation, and hardware mapping which are needed in process of ASIP design. The experiments are carried on RISC-V (Reduced Instruction Set Computing) processor described in Codasip Studio.

Anglický abstrakt

A processor plays the main role in almost every electronics system. The use of a general purpose processor may not be profitable for a specific application, because the processor is designed for a wide set of applications. Application Specific Instruction-set Processors (ASIPs) are today applied in specific cases, where one application or a certain group of applications is performed. This paper focuses on automatic optimization of an ASIP for a given application through checking its possible configurations of key parameters (number of registers, size of caches, instruction set modification, etc.). The paper also presents designed framework which is able to optimize the given application in terms of speed, area or power consumption. The framework allows to use various optimization methods. For the processor modification, the Codasip Studio tool is used. It allows to generate all tools needed for compilation, simulation, and hardware mapping which are needed in process of ASIP design. The experiments are carried on RISC-V (Reduced Instruction Set Computing) processor described in Codasip Studio.

Dokumenty

BibTex


@inproceedings{BUT155019,
  author="Jakub {Podivínský} and Ondřej {Čekan} and Martin {Krčma} and Radek {Burget} and Tomáš {Hruška} and Zdeněk {Kotásek}",
  title="A Framework for Optimizing a Processor to Selected Application",
  annote="A processor plays the main role in almost every electronics system. The use of
a general purpose processor may not be profitable for a specific application,
because the processor is designed for a wide set of applications. Application
Specific Instruction-set Processors (ASIPs) are today applied in specific cases,
where one application or a certain group of applications is performed. This paper
focuses on automatic optimization of an ASIP for a given application through
checking its possible configurations of key parameters (number of registers, size
of caches, instruction set modification, etc.). The paper also presents designed
framework which is able to optimize the given application in terms of speed, area
or power consumption. The framework allows to use various optimization methods.
For the processor modification, the Codasip Studio tool is used. It allows to
generate all tools needed for compilation, simulation, and hardware mapping which
are needed in process of ASIP design. The experiments are carried on RISC-V
(Reduced Instruction Set Computing) processor described in Codasip Studio.",
  address="IEEE Computer Society",
  booktitle="Proceedings of IEEE East-West Design & Test Symposium",
  chapter="155019",
  doi="10.1109/EWDTS.2018.8524733",
  edition="NEUVEDEN",
  howpublished="online",
  institution="IEEE Computer Society",
  year="2018",
  month="september",
  pages="564--574",
  publisher="IEEE Computer Society",
  type="conference paper"
}