Course detail
Digital Systems Design
FIT-INCAcad. year: 2020/2021
Binary number system: positional notation, conversion of the base, binary codes, binary arithmetic. Boolean algebra, logic functions and their representations: logic expressions, reduction methods, the design of combinatorial logic networks. Analysis of logic networks behaviour: signal races, hazards. Selected logic modules: adder, subtractor, multiplexer, demultiplexer, decoder, coder, comparator, arithmetic and logic unit. Simple asynchronous networks: design and analysis of behaviour. Sequential logic networks, latches and flip-flops. State machines and their representations. Design of synchronized sequential networks: state coding, optimization and implementation. Register, counter, shift register, impulse divider. Design of simple digital equipment: design CAD tools, description tools, design strategy. Integrated circuits families. Programmable logic devices.
Supervisor
Department
Learning outcomes of the course unit
Fundamental knowledge of selected methods for description, analysis and design of combinatorial and sequential logic in digital systems.
Prerequisites
The sets, relations and mappings. Basic terms and axioms of Boolean algebra. The elementary notions of the graph theory. Rudiments of electrical engineering phenomena and basic active and passive electronic elements.
- recommended prerequisite
Co-requisites
Not applicable.
Recommended optional programme components
Not applicable.
Recommended or required reading
Eysselt, M.: Logické systémy. Studijní opora, Učební text VUT Brno, vydáno 1980, 1985, 1990. Rozebráno: Lze si zapůjčovat v knihovnách v Brně, i na FIT. (CS)
Maurer, P.M.: Logic Design (http://www.csee.usf.edu/~maurer/logic/). University of South Florida, WWW Edition.
Frištacký, N., Kolesár, M., Kolenička, J., Hlavatý, J.: Logické systémy. SNTL Praha, ALFA Bratislava, 1986. (CS)
Bout, D.V.: Pragmatic Logic Design With Xilinx Foundation 2.1i (http://www.xess.com/pragmatic-2_1.html). XESS Corporation, WWW Edition.
Bolton, M.: Digital Systems Design with Programmable Logic. Addison-Wesley Publishing Company, Cornwall, GB, ISBN 0-201-14545-6, 1990.
Maurer, P.M.: Logic Design (http://www.csee.usf.edu/~maurer/logic/). University of South Florida, WWW vydání. (EN)
Bout, D.V.: Pragmatic Logic Design With Xilinx Foundation 2.1i (http://www.xess.com/pragmatic-2_1.html). XESS Corporation, WWW vydání. (EN)
McCluskey, E.J.: LOGIC DESIGN PRICIPLES. Prentice-Hall, USA, ISBN 0-13-539768-5, 1986.
Cheung, J.Y. - Bredeson, J.G.: MODERN DIGITAL SYSTEMS DESIGN. West Publishing Company, USA, ISBN 0-314-47828-0, 1990.
Sasao, T.: SWITCHING THEORY FOR LOGIC SYNTHESIS (http://www.wkap.nl/prod/b/0-7923-8456-3). Kluwer Academic Publishers, Boston, USA, ISBN 0-7923-8456-3, 1999.
Amaral, J.N.: COMPUTER ORGANIZATION AND ARCHITECTURE I (http://www.cs.ualberta.ca/~amaral/courses/229/). University of Alberta, Edmonton, CA, 2003.
Amaral, J.N.: COMPUTER ORGANIZATION AND ARCHITECTURE II (http://www.cs.ualberta.ca/~amaral/courses/329/). University of Alberta, Edmonton, CA, 2003.
Eysselt, M.: Digital Systems Design: Basic Set of Problems 1 (http://www.fit.vutbr.cz/research/view_pub.php.en?id=7130) (SSI Circuits Networks). Student-Text of the FIT, Brno UT, 2003 (WWW version (http://www.fit.vutbr.cz/~eysselt/inc/inc-1se1.htm)).
Eysselt, M.: Vybrané příklady podporující návrh číslicových systémů (http://www.fit.vutbr.cz/research/view_pub.php?id=6968). Studijní opora, Učební text, FIT, 2002, 38 str. Tento text zapůjčuje autor ke kopírování. Zde je WWW verze (http://www.fit.vutbr.cz/~eysselt/inc/prikla01.htm) přístupná evidovaným studentům. (CS)
Eysselt, M.: Digital Systems Design: Basic Set of Problems 2 (http://www.fit.vutbr.cz/research/view_pub.php?id=7140) (MSI Circuits Networks). Student-Text of the FIT, Brno UT, 2003 (WWW version (http://www.fit.vutbr.cz/~eysselt/inc/inc-2se1.htm)).
Eysselt. M.: Funkční značky integrovaných obvodů, kreslení spojů (http://www.fit.vutbr.cz/research/view_pub.php?id=6969). Studijní opora, Učební text, FIT, 2002, 12 str. Tento učební text zapůjčuje autor ke kopírování. Zde je WWW verze (http://www.fit.vutbr.cz/~eysselt/inc/znacky01.htm) přístupná evidovaným studentům. (CS)
Eysselt, M.: Digital Systems Design: Binary Logic Elements (http://www.fit.vutbr.cz/research/view_pub.php.en?id=7132) (Grafic Symbols for Diagrams). Student-Text of the FIT, Brno UT, 2003 (WWW version (http://www.fit.vutbr.cz/~eysselt/inc/inc-bsy1.htm)).
Eysselt, M.: Digital Systems Design: Laboratory (http://www.fit.vutbr.cz/research/view_pub.php.en?id=7131) (TTL Family Circuits and Functional Diagrams). Student-Text of the FIT, Brno UT, 2003 (WWW version (http://www.fit.vutbr.cz/~eysselt/inc/inc-lab1.htm)).
Eysselt, M.: Digital Systems Design: Programmable Logic Devices (http://www.fit.vutbr.cz/research/view_pub.php?id=7088). Studijní opora, Učební text, FIT VUT v Brně, 2003. Zde je WWW verze (http://www.fit.vutbr.cz/~eysselt/inc/inc-pld1.htm) přístupná evidovaným studentům. (EN)
Eysselt, M.: Digital Systems Design: Slides 2003 (http://www.fit.vutbr.cz/research/view_pub.php.en?id=7133) (Set of Basic Slides). Student-Text of the FIT, Brno UT, 2003.
Eysselt, M.: Digital Systems Design: Programmable Logic Devices (http://www.fit.vutbr.cz/research/view_pub.php.en?id=7088) (Foundations & Examples). Student-Text of the FIT Brno UT, FIT Brno UT, 2003 (WWW version (http://www.fit.vutbr.cz/~eysselt/inc/inc-pld1.htm)).
Harris, D., Harris, S.: Digital Design and Computer Architecture 2nd Edition, Morgan Kaufmann, eBook ISBN: 9780123978165, paperback ISBN: 9780123944245, 2012.
Wakerly, J. F.: Digital Design: Principles and Practices (4th Edition, Book only) 4th Edition, PEARSON, ISBN: 9788131713662, 8131713660, Edition: 4th Edition, 2008.
Mano, M. M. R, Ciletti, D.: Digital Design (4th Edition), Prentice-Hall, ISBN:0131989243, 2006.
Planned learning activities and teaching methods
Not applicable.
Assesment methods and criteria linked to learning outcomes
Standard students in Czech Programme:
1) Mid-term exam: 25 points.
2) Homework and its evaluation in PC laboratory: 20 points.
3) Final exam: 55 points.
The passing boundary for ECTS assessment: 50 points.
International students:
1) Test: 20 points.
2) Mid-term exam: 20 points.
3) Final exam: 60 points.
The passing boundary for ECTS assessment: 50 points.
Exam prerequisites:
For receiving the credit and thus for entering the exam, students have to obtain at least five points from the project. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action may be initiated.
Language of instruction
Czech, English
Work placements
Not applicable.
Aims
The goal is to obtain fundamental knowledge of methods for description, analysis, and design of combinatorial and sequential logic networks in digital systems.
Specification of controlled education, way of implementation and compensation for absences
The knowledge of students is examined by the mid-exam (25 points), the project (20 points) and by the final exam. The minimal number of points, which can be obtained from the final exam, is 25 (of 55 points). Otherwise, no points will be assigned to a student. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action can be initiated.
Type of course unit
Lecture
39 hours, optionally
Teacher / Lecturer
Syllabus
- Binary number system: positional notation, conversion of the base, binary codes, binary arithmetic.
- Boolean algebra, logic functions and their representations, logic expressions.
- Reduction methods: Karnaugh maps, Quine-McCluskey tabular method, Petrick's cover function.
- Logic and functional diagrams. Analysis of logic networks behaviour: signal races, hazards.
- Combinational logic: multiplexer, demultiplexer, decoder, coder.
- Combinational logic: comparator, adder, subtractor, arithmetic and logic unit.
- State machines and their representations. Latches and flip-flops.
- Synchronized sequential networks: state coding, optimization and implementation.
- Sequential logic: Registers, counters, shift registers, frequency dividers.
- VHDL language, logic circuits synthesis.
- Design of simple digital circuits: CAD tools, design methodology, FITkit.
- Programmable logic devices.
- Integrated circuits families.
Fundamentals seminar
10 hours, compulsory
Teacher / Lecturer
Syllabus
- Binary number system: positional notation, conversion of the base, binary codes, binary arithmetic.
- Boolean algebra, logic functions and their representations, a behaviour analysis of contact-switch networks.
- Logic expressions. Quine-McCluskey tabular reduction method, Petrick's cover function.
- Reduction methods: Karnaugh maps, logic and functional diagrams.
- Logic functions implementation using logic components.
- Selected logic modules: multiplexer, demultiplexer, encoder, decoder, adder, ALU.
- State machines and their representations. Design of synchronized sequential networks.
- Design of logic networks using programmable logic devices.