Course detail

Advanced Digital Systems

FIT-PCSAcad. year: 2018/2019

This
course is aimed at teaching advanced techniques of digital circuit
design. Firstly, it presents a brief overview of basic approaches to
modelling and simulation of digital circuits using the VHDL language and
summarizes key properties of target technologies, such as ASIC and
FPGA. Next, the course introduces advanced techniques of digital
circuits minimization and synthesis (pipelining, retiming), which are
supplemented by the application of constraints. The main part of the
course is focused on modern approaches to the synthesis of digital
circuits. This includes models and methods used for optimisation at
logical level and with respect to target technology as well as
approaches that build on synergy between synthesis and verification of
digital circuits. Apart from these main topics, the course also touches
some additional topics like low-power design and the verification of
digital circuits based on the OVM methodology.

Learning outcomes of the course unit

The students are able to design complex constrained digital systems using contemporary design techniques and they know modern methods for synthesis and verification of these systems.

Prerequisites

Digital system design, basic programming skills.

Co-requisites

Not applicable.

Recommended optional programme components

Not applicable.

Recommended or required reading

  • Přednáškové materiály v elektronické formě

  • Gajsky D., Dutt N., Wu A., Lin S.: High-Level Synthesis: Introduction to Chip and System Design, ISBN 079239194-2, 1992
  • Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008
  • Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996

Planned learning activities and teaching methods

Not applicable.

Assesment methods and criteria linked to learning outcomes

Written mid-term exam and project in due dates.
Exam prerequisites:
Requirements for class accreditation are not defined.

Language of instruction

Czech

Work placements

Not applicable.

Course curriculum

    Syllabus of lectures:
    • Combinatorial and sequential logic design techniques, algorithms, and tools review.
    • Review of digital design target technologies (ASIC, FPGA).
    • Algorithms for minimization of digital circuits.
    • Advanced synthesis techniques (pipelining, retiming).
    • Constraint conditions.
    • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
    • Modern synthesis of digital circuits (logic optimization).
    • Modern synthesis of digital circuits (optimization for target technology).
    • Synergy between synthesis and verification of digital circuits.
    • Low power design methodologies.
    • Reconfigurable computing.
    • Verification of digital circuits (OVM methodology).

    Syllabus of computer exercises:
    • Synthesis of the basic logic circuits, pipelining, retiming.
    • Constraint conditions.
    • Synthesis of basic digital circuits using ABC tool.
    • Synthesis of advanced digital circuits using ABC tool.
    • Verification of digital circuits.

    Syllabus - others, projects and individual work of students:
    • Individual project focused on digital design using CatapultC environment.

Aims

To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.

Specification of controlled education, way of implementation and compensation for absences

Presence in any form of instruction is not compulsory. An absence (and hence loss of points) can be compensated in the following ways: 

  1. presence in another laboratory group dealing with the same task. 
  2. showing a summary of results to the tutor at the next lab. 
  3. sending a short report (summarizing the results of the missed lab and answering the questions from the assignment) to the tutor, in 14 days after the missed lab.

Classification of course in study plans

  • Programme IT-MGR-2 Master's

    branch MBI , any year of study, winter semester, 5 credits, compulsory-optional
    branch MGM , any year of study, winter semester, 5 credits, compulsory-optional
    branch MSK , any year of study, winter semester, 5 credits, optional
    branch MIS , any year of study, winter semester, 5 credits, optional
    branch MBS , any year of study, winter semester, 5 credits, optional
    branch MIN , any year of study, winter semester, 5 credits, optional
    branch MMM , any year of study, winter semester, 5 credits, optional
    branch MPV , 2. year of study, winter semester, 5 credits, compulsory

Type of course unit

 

Lecture

26 hours, optionally

Teacher / Lecturer

Syllabus


  • Combinatorial and sequential logic design techniques, algorithms, and tools review.
  • Review of digital design target technologies (ASIC, FPGA).
  • Algorithms for minimization of digital circuits.
  • Advanced synthesis techniques (pipelining, retiming).
  • Constraint conditions.
  • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
  • Modern synthesis of digital circuits (logic optimization).
  • Modern synthesis of digital circuits (optimization for target technology).
  • Synergy between synthesis and verification of digital circuits.
  • Low power design methodologies.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology).

Computer exercise

10 hours, compulsory

Teacher / Lecturer

Syllabus


  • Synthesis of the basic logic circuits, pipelining, retiming.
  • Constraint conditions.
  • Synthesis of basic digital circuits using ABC tool.
  • Synthesis of advanced digital circuits using ABC tool.
  • Verification of digital circuits.

Projects

16 hours, compulsory

Teacher / Lecturer

Syllabus


  • Individual project focused on synthesis of digital circuits.

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