Methods of Digital Integrated Circuits Design
FEKT-LNDOAcad. year: 2017/2018
Aspects of design of digital integrated circuits. Used technologies (bipolar, CMOS, BiCMOS. Novel circuit principles, modern digital building block of ASICs. Computer exercices focused on simulation and design of digital functional blocks. Use of professional design system CADENCE for complex design of digital IC (includig layout).
Learning outcomes of the course unit
Student obtains following knowledge:
- is able to describe required steps in digital integrated circuit design
- is able to design advanced combinational and sequential circuits by usin VHDL
- is able to write basic TCL script for RTL synthesis performed in Cadence RTL Compiler
- is able to do analysis of digital circuit regarding speed, area and power consumption
- is able to use modern design tools for digital integrated circuit design
Student should know:
- design of advanced combinational and sequential digital circuits by using VHDL
- define proper conditions and specifications according to designed digital circuit
- work with documentation and design any digital circuit according to this specification
- implementation of designed digital system into the programmable circuit
- verification and evaluation of designed digital system
Recommended optional programme components
Recommended or required reading
Baker, J.R.:"CMOS circuit design, layout and simulation", IEEE Press a Wiley Interscience, ISBN 0-471-70055-X, 2005
Planned learning activities and teaching methods
Techning methods include lectures, computer laboratories and practical laboratories. Course is taking advantage of e-learning (Moodle) system.
Assesment methods and criteria linked to learning outcomes
Requirements for completion of a course are specified by a regulation issued by the lecturer responsible for the course and updated for every.
Language of instruction
1. Complex structures of digital circuits
2. Enhanced VHDL language and advanced syntax
3. Synthesis, static timing analysis, front-end phase
4. Implementation, clock tree synthesis, RC extraction, back-end phase
5. Front-end vs. Back-end
6. Verification - LVS, DRC
Aim of this course is make students familiar with modern methods for digital IC design. They will be familiar with methods for design of their blocks (including chip layout), with their properties and applications.
Specification of controlled education, way of implementation and compensation for absences
The content and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.
Classification of course in study plans
- Programme EEKR-ML Master's
branch ML-MEL , 2. year of study, winter semester, 6 credits, compulsory
- Programme EEKR-ML1 Master's
branch ML1-MEL , 2. year of study, winter semester, 6 credits, optional specialized
- Programme EEKR-CZV lifelong learning
branch ET-CZV , 1. year of study, winter semester, 6 credits, compulsory