Course detail

Digital Systems Design

FIT-INCAcad. year: 2010/2011

Binary digit system: positional notation, conversion of base, binary codes, binary arithmetic. Boolean algebra, logic functions and their representations: logic expressions, reduction methods, design of combinational logic networks. Analysis of logic networks behaviour: signal races, hazards. Selected logic modules: adder, subtractor, multiplexer, demultiplexer, decoder, coder, comparator, arithmetic and logic unit. Sequential logic networks, latches and flip-flops. State machines and their representations. Design of synchronized sequential networks: state assigment, optimization and implementation. Register, counter, shift register, impulse divider. Design of simple digital equipment: design CAD tools, description tools, design strategy. Integrated circuits families: SSI, MSI, LSI. Programmable logic devices: gate arrays, PROM, PLA, PAL. Simple asynchronous networks: design, analysis of behaviour, hazards.

Language of instruction

Czech

Number of ECTS credits

5

Mode of study

Not applicable.

Guarantor

doc. Dr. Ing. Otto Fučík

Department

Department of Computer Systems (UPSY)

Learning outcomes of the course unit

To obtain an overview and fundamental knowledge of a practical use of selected methods for description of combinational and sequential logic networks which are inside digital equipments. To learn how to analyze and design combinational logic devices. To learn how to analyze and design sequential logic devices. Mastering of design of digital circuits consisting of combinational and sequential logic devices.

Prerequisites

The sets, relations and mappings. Basic terms and axioms of Boolean algebra. The elementary notions of the graph theory. Rudiments of electrical engineering phenomena and basic active and passive electronic elements.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Not applicable.

Assesment methods and criteria linked to learning outcomes

Study evaluation is based on marks obtained for specified items. Minimimum number of marks to pass is 50.

Requirements for class accreditation are not defined.

Course curriculum

  • Binary digit system: positional notation, conversion of base, binary codes, binary arithmetic.
  • Boolean algebra, logic functions and their representations, logic expressions.
  • Reduction methods: Qiune-McCluskey tabular method, Petrick's cover function.
  • Reduction methods: Karnaugh maps, logic and functional diagrams.
  • Analysis of logic networks behaviour: signal races, hazards.
  • Selected logic modules: adder, subtractor, multiplexer, demultiplexer, decoder, coder, comparator, arithmetic and logic unit.
  • Sequential logic networks, latches and flip-flops.
  • State machines and their representations. Design of synchronized sequential networks: state assigment, optimization and implementation. Register, counter, shift register, impulse divider.
  • Design of simple digital equipment: CAD tools, description tools, design strategy.
  • Integrated circuits families: SSI, MSI, LSI. Programmable logic devices: gate arrays, PROM, PLA, PAL.
  • Simple asynchronous networks: design, analysis of behaviour, hazards.

Work placements

Not applicable.

Aims

To obtain an overview and fundamental knowledge of a practical use of selected methods for description of combinational and sequential logic networks which are inside digital equipments. To learn how to analyze and design combinational logic devices. To learn how to analyze and design sequential logic devices. To learn about design of digital circuits consisting of combinational and sequential logic devices.

Specification of controlled education, way of implementation and compensation for absences

Mid-term exam (incl. test if it is declared), laboratory practice supported by homework (or project work) and final exam are the monitored, and points earning, education.
Mid-term exam and laboratory practice (supported by the homework) are without correction eventuality. Points for homework may be obtained at the last laboratory class after successful modelling of all laboratory statements. Final exam has two additional correction eventualities.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Basic literature

Wakerly, J. F.: Digital Design: Principles and Practices (4th Edition, Book only) 4th Edition, PEARSON, ISBN: 9788131713662, 8131713660, Edition: 4th Edition, 2008. (EN)
Mano, M. M. R, Ciletti, D.: Digital Design (4th Edition), Prentice-Hall, ISBN:0131989243, 2006. (EN)

Recommended reading


Classification of course in study plans

  • Programme IT-BC-3 Bachelor's

    branch BIT , 1. year of study, summer semester, compulsory

Type of course unit

 

Lecture

39 hours, optionally

Teacher / Lecturer

doc. Dr. Ing. Otto Fučík

Syllabus

  • Binary digit system: positional notation, conversion of base, binary codes, binary arithmetic.
  • Boolean algebra, logic functions and their representations, logic expressions.
  • Reduction methods: Qiune-McCluskey tabular method, Petrick's cover function.
  • Reduction methods: Karnaugh maps, logic and functional diagrams.
  • Analysis of logic networks behaviour: signal races, hazards.
  • Selected logic modules: adder, subtractor, multiplexer, demultiplexer, decoder, coder, comparator, arithmetic and logic unit.
  • Sequential logic networks, latches and flip-flops.
  • State machines and their representations. Design of synchronized sequential networks: state assigment, optimization and implementation. Register, counter, shift register, impulse divider.
  • Design of simple digital equipment: CAD tools, description tools, design strategy.
  • Integrated circuits families: SSI, MSI, LSI. Programmable logic devices: gate arrays, PROM, PLA, PAL.
  • Simple asynchronous networks: design, analysis of behaviour, hazards.

Fundamentals seminar

10 hours, optionally

Teacher / Lecturer

doc. Dr. Ing. Otto Fučík

Syllabus

  • Binary digit system: positional notation, conversion of base, binary codes, binary arithmetic.
  • Boolean algebra, logic functions and their representations, a behaviour analysis of contact-switch networks.
  • Logic expressions. Qiune-McCluskey tabular reduction method, Petrick's cover function.
  • Reduction methods: Karnaugh maps, logic and functional diagrams.
  • Logic functions implementation using SSI i.cs. Behaviour analysis of logic networks: signal races, hazards.
  • Selected logic modules: adders, subtractor.
  • State machines and their representations. Design of synchronized sequential networks.
  • Design of logic networks based on MSI and LSI i.cs. Programmable logic devices: gate arrays, PROM, PLA, PAL.

Project

3 hours, optionally

Teacher / Lecturer

doc. Dr. Ing. Otto Fučík