Publication detail

Design and Optimization of ColdFire CPU Arithmetic Logical Unit

ADAMEC, F. FRÝZA, T.

Original Title

Design and Optimization of ColdFire CPU Arithmetic Logical Unit

Type

conference paper

Language

English

Original Abstract

This article describes design of ColdFire microprocessor ALU (Arithmetic Logical Unit) in VHDL language and presents an optimization to obtain maximum performance in Xilinx Virtex IV FPGA. The basic function of ALU is explained. There are described the instructions which any ALU must handle and some possibility how to design it. The advantages and disadvantages of performance are obtained as well.

Keywords

Arithmetic Logical Unit; VHDL; FPGA; instructions

Authors

ADAMEC, F.; FRÝZA, T.

RIV year

2009

Released

11. 6. 2009

Location

Lodz (Poland)

ISBN

978-83-928756-0-4

Book

Proceedings of 16th International Conference Mixed Design of Integrated Circuits and Systems

Pages from

699

Pages to

702

Pages count

4

BibTex

@inproceedings{BUT32734,
  author="Filip {Adamec} and Tomáš {Frýza}",
  title="Design and Optimization of ColdFire CPU Arithmetic Logical Unit",
  booktitle="Proceedings of 16th International Conference Mixed Design of Integrated Circuits and Systems",
  year="2009",
  pages="699--702",
  address="Lodz (Poland)",
  isbn="978-83-928756-0-4"
}