Publication detail

Efficiency of the Signal Processing Algorithms Using Signal-Flow Based Mapping Tool

MEGO, R. FRÝZA, T.

Original Title

Efficiency of the Signal Processing Algorithms Using Signal-Flow Based Mapping Tool

English Title

Efficiency of the Signal Processing Algorithms Using Signal-Flow Based Mapping Tool

Type

conference paper

Language

en

Original Abstract

This paper is dealing with the implementation of the signal processing algorithms, specifically the Fast Fourier Transform and the matrix multiplication, using the new tool for mapping instructions on functional units of the processor. The tool is using the signal-flow based description of the algorithm instead of the sequential notation of the program execution. The selected target processor is a multi-core digital signal processor based on the very long instruction word architecture. The final assembly code is analyzed in terms of utilization of the functional units and general purpose registers.

English abstract

This paper is dealing with the implementation of the signal processing algorithms, specifically the Fast Fourier Transform and the matrix multiplication, using the new tool for mapping instructions on functional units of the processor. The tool is using the signal-flow based description of the algorithm instead of the sequential notation of the program execution. The selected target processor is a multi-core digital signal processor based on the very long instruction word architecture. The final assembly code is analyzed in terms of utilization of the functional units and general purpose registers.

Keywords

digital signal processor; instruction mapping; VLIW; TMS320C6678

RIV year

2015

Released

14.04.2015

ISBN

978-1-4799-8117-5

Book

Proceedings of 25th International Conference Radioelektronika 2015

Pages from

288

Pages to

291

Pages count

4

BibTex


@inproceedings{BUT114327,
  author="Roman {Mego} and Tomáš {Frýza}",
  title="Efficiency of the Signal Processing Algorithms Using Signal-Flow Based Mapping Tool",
  annote="This paper is dealing with the implementation of the signal processing algorithms, specifically the Fast Fourier Transform and the matrix multiplication, using the new tool for mapping instructions on functional units of the processor. The tool is using the signal-flow based description of the algorithm instead of the sequential notation of the program execution. The selected target processor is a multi-core digital signal processor based on the very long instruction word architecture. The final assembly code is analyzed in terms of utilization of the functional units and general purpose registers.",
  booktitle="Proceedings of 25th International Conference Radioelektronika 2015",
  chapter="114327",
  doi="10.1109/RADIOELEK.2015.7129035",
  howpublished="print",
  year="2015",
  month="april",
  pages="288--291",
  type="conference paper"
}