Publication detail

Vector Field Calculations on a Special Hardware Architecture

HEROUT, A., TIŠNOVSKÝ, P.

Original Title

Vector Field Calculations on a Special Hardware Architecture

English Title

Vector Field Calculations on a Special Hardware Architecture

Type

conference paper

Language

en

Original Abstract

The paper proposes several methods of storing a huge array of 3D vectors in the memory of a hardware acceleration unit based on FPGA/DSP. This architecture offers effective single-bit access, and therefore proves to be more flexible in some cases, comparing to the architectures commonly used.

English abstract

The paper proposes several methods of storing a huge array of 3D vectors in the memory of a hardware acceleration unit based on FPGA/DSP. This architecture offers effective single-bit access, and therefore proves to be more flexible in some cases, comparing to the architectures commonly used.

Keywords

vectors, vector field, visualization, FPGA, hardware acceleration

RIV year

2003

Released

12.09.2002

Publisher

TU Vienna

Location

Graz

ISBN

3-85403-163

Book

East-West-Vision 2002 Proceedings

Pages from

263

Pages to

264

Pages count

2

Documents

BibTex


@inproceedings{BUT10051,
  author="Adam {Herout} and Pavel {Tišnovský}",
  title="Vector Field Calculations on a Special Hardware Architecture",
  annote="The paper proposes several methods of storing a huge array of 3D
vectors in the memory of a hardware acceleration unit based on
FPGA/DSP. This architecture offers effective single-bit access, and
therefore proves to be more flexible in some cases, comparing to the
architectures commonly used.",
  address="TU Vienna",
  booktitle="East-West-Vision 2002 Proceedings",
  chapter="10051",
  institution="TU Vienna",
  year="2002",
  month="september",
  pages="263--264",
  publisher="TU Vienna",
  type="conference paper"
}