Publication detail

DATA SYSTEM PROCESSING FOR MEMORY CARD ARRAYS

JANŮŠ, T. ŠTEFFAN, P.

Original Title

DATA SYSTEM PROCESSING FOR MEMORY CARD ARRAYS

English Title

DATA SYSTEM PROCESSING FOR MEMORY CARD ARRAYS

Type

conference paper

Language

en

Original Abstract

The submitted thesis is concerned with a design of the multiplicator of memory cards. The basic focus of this thesis is the analysis of individual system components and adjustment of the existing arrangement. The analysis describes the existing arrangement of the multiplicator and deals with the potential of individual components. Adjustment of the existing arrangement includes definitions and processes of the individual multiplicator components design to the achievement of optimal performance. Operating of the multiplicator is fully controlled by a PC.

English abstract

The submitted thesis is concerned with a design of the multiplicator of memory cards. The basic focus of this thesis is the analysis of individual system components and adjustment of the existing arrangement. The analysis describes the existing arrangement of the multiplicator and deals with the potential of individual components. Adjustment of the existing arrangement includes definitions and processes of the individual multiplicator components design to the achievement of optimal performance. Operating of the multiplicator is fully controlled by a PC.

Keywords

FPGA, Spartan 6, N2M400FDA311A30, eMMC, UM232H, Mojo v3

Released

28.12.2017

ISBN

978-80-214-5419-4

Book

Sborník IMAPS flash Conference 2017

Pages from

22

Pages to

26

Pages count

36

BibTex


@inproceedings{BUT149216,
  author="Tomáš {Janůš} and Pavel {Šteffan}",
  title="DATA SYSTEM PROCESSING FOR MEMORY CARD ARRAYS",
  annote="The submitted thesis is concerned with a design of the multiplicator of memory cards. The basic focus of this thesis is the analysis of individual system components and adjustment of the existing arrangement. The analysis describes the existing arrangement of the multiplicator and deals with the potential of individual components. Adjustment of the existing arrangement includes definitions and processes of the individual multiplicator components design to the achievement of optimal performance. Operating of the multiplicator is fully controlled by a PC.",
  booktitle="Sborník IMAPS flash Conference 2017",
  chapter="149216",
  howpublished="print",
  year="2017",
  month="december",
  pages="22--26",
  type="conference paper"
}