Publication detail

New Switched-Capacitor Pipelined ADC

J. HAZE, R. VRBA, L. FUJCIK, M. SKOCDOPOLE

Original Title

New Switched-Capacitor Pipelined ADC

English Title

New Switched-Capacitor Pipelined ADC

Type

conference paper

Language

en

Original Abstract

The paper deals with a new 12-bit low power switched-capacitor (SC) ADC for portable applications, such PDA, notebook etc. The paper describes design of ADC and its behavioural modelling regarding low power consumption. The Op-Amp sharing technique and capacitor scaling approach are utilized to obtain it. The basic block topology design is outlined too. The cancellation techniques to avoid the error sources rising of using SC technique for i.e. capacitor mismatch, clock feedthrough, finite gain and offset of Op-Amp etc. are utilized in the design.

English abstract

The paper deals with a new 12-bit low power switched-capacitor (SC) ADC for portable applications, such PDA, notebook etc. The paper describes design of ADC and its behavioural modelling regarding low power consumption. The Op-Amp sharing technique and capacitor scaling approach are utilized to obtain it. The basic block topology design is outlined too. The cancellation techniques to avoid the error sources rising of using SC technique for i.e. capacitor mismatch, clock feedthrough, finite gain and offset of Op-Amp etc. are utilized in the design.

Keywords

Pipelined ADC, switched-capacitor technique, portable application

RIV year

2005

Released

01.01.2005

Publisher

WSEAS

Location

Cancun, Mexiko

ISBN

960-8457-21-1

Book

Proceedings of the 5th WSEAS International Conference on Instrumentation, Measurement, Control, Circuits and Systems

Edition number

1

Pages from

132

Pages to

134

Pages count

3

BibTex


@inproceedings{BUT14814,
  author="Jiří {Háze} and Lukáš {Fujcik} and Radimír {Vrba}",
  title="New Switched-Capacitor Pipelined ADC",
  annote="The paper deals with a new 12-bit low power switched-capacitor (SC) ADC for portable applications, such
PDA, notebook etc. The paper describes design of ADC and its behavioural modelling regarding low power
consumption. The Op-Amp sharing technique and capacitor scaling approach are utilized to obtain it. The basic block
topology design is outlined too. The cancellation techniques to avoid the error sources rising of using SC technique for
i.e. capacitor mismatch, clock feedthrough, finite gain and offset of Op-Amp etc. are utilized in the design.",
  address="WSEAS",
  booktitle="Proceedings of the 5th WSEAS International Conference on Instrumentation, Measurement, Control, Circuits and Systems",
  chapter="14814",
  institution="WSEAS",
  year="2005",
  month="january",
  pages="132",
  publisher="WSEAS",
  type="conference paper"
}