Publication detail

A Novel Pseudo-Differential Integer/Fractional-Order Voltage-Mode All-Pass Filter

HERENCSÁR, N. ŠOTNER, R. KARTCI, A. VRBA, K.

Original Title

A Novel Pseudo-Differential Integer/Fractional-Order Voltage-Mode All-Pass Filter

English Title

A Novel Pseudo-Differential Integer/Fractional-Order Voltage-Mode All-Pass Filter

Type

conference paper

Language

en

Original Abstract

The paper presents the first- (integer) and fractional-order case studies of a novel pseudo-differential (P-D) voltage-mode all-pass filter (APF) employing a single differential voltage current conveyor (DVCC), one resistor, and a single grounded capacitor. The proposed filter brings significant reduction of complexity in comparison to available fully-differential or P-D filter topologies. Moreover, it was also shown that fractional-order capacitor can be used for gain response compensation of the proposed APF. The theoretical results of 0.8th and 1st-order APF were verified by Cadence IC6 Spectre simulations using new structure of DVCC via TSMC 0.18 µm CMOS process parameters supplied with ±0.9 V voltages.

English abstract

The paper presents the first- (integer) and fractional-order case studies of a novel pseudo-differential (P-D) voltage-mode all-pass filter (APF) employing a single differential voltage current conveyor (DVCC), one resistor, and a single grounded capacitor. The proposed filter brings significant reduction of complexity in comparison to available fully-differential or P-D filter topologies. Moreover, it was also shown that fractional-order capacitor can be used for gain response compensation of the proposed APF. The theoretical results of 0.8th and 1st-order APF were verified by Cadence IC6 Spectre simulations using new structure of DVCC via TSMC 0.18 µm CMOS process parameters supplied with ±0.9 V voltages.

Keywords

all-pass filter; differential voltage current conveyor; DVCC; fractional-order capacitor; fractional-order filter; pseudo-differential filter; voltage-mode

Released

08.05.2018

Publisher

IEEE

Location

Florence, Italy

ISBN

978-1-5386-4881-0

Book

Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Pages from

1

Pages to

5

Pages count

5

URL

https://ieeexplore.ieee.org/document/8351520/

Full text in the Digital Library

http://hdl.handle.net/11012/72421

Documents

BibTex 


@inproceedings{BUT147301,
  author="Norbert {Herencsár} and Roman {Šotner} and Aslihan {Kartci} and Kamil {Vrba}",
  title="A Novel Pseudo-Differential Integer/Fractional-Order Voltage-Mode All-Pass Filter",
  annote="The paper presents the first- (integer) and fractional-order case studies of a novel pseudo-differential (P-D) voltage-mode all-pass filter (APF) employing a single differential voltage current conveyor (DVCC), one resistor, and a single grounded capacitor. The proposed filter brings significant reduction of complexity in comparison to available fully-differential or P-D filter topologies. Moreover, it was also shown that fractional-order capacitor can be used for gain response compensation of the proposed APF. The theoretical results of 0.8th and 1st-order APF were verified by Cadence IC6 Spectre simulations using new structure of DVCC via TSMC 0.18 µm CMOS process parameters supplied with ±0.9 V voltages.",
  address="IEEE",
  booktitle="Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS)",
  chapter="147301",
  doi="10.1109/ISCAS.2018.8351520",
  howpublished="online",
  institution="IEEE",
  year="2018",
  month="may",
  pages="1--5",
  publisher="IEEE",
  type="conference paper"
}