Publication detail

Low-Voltage Fully Cascadable Resistorless Transadmittance-Mode All-Pass Filter

HERENCSÁR, N. KOTON, J. VRBA, K. CICEKOGLU, O.

Original Title

Low-Voltage Fully Cascadable Resistorless Transadmittance-Mode All-Pass Filter

Czech Title

Low-Voltage Fully Cascadable Resistorless Transadmittance-Mode All-Pass Filter

English Title

Low-Voltage Fully Cascadable Resistorless Transadmittance-Mode All-Pass Filter

Type

conference paper

Language

en

Original Abstract

This paper presents a new realization of a first-order transadmittance-mode (TAM) all-pass filter (APF). In the proposed mixed-mode APF a simple transconductor, inverting voltage buffer, and unity-gain current follower are used as active building blocks. Considering the input intrinsic resistance of current follower as useful active filter parameter, the proposed TAM APF employs only a floating capacitor as external passive component. Hence, it is a resistorless circuit. In addition, due to high-impendence voltage input and high-impedance of output current terminal, it is fully cascadable filter realization. SPICE simulation results are included to support the theory. In the design the PTM 90 nm level-7 CMOS process BSIM3v3 parameters with low (+-0.5 V) DC voltages were used.

Czech abstract

This paper presents a new realization of a first-order transadmittance-mode (TAM) all-pass filter (APF). In the proposed mixed-mode APF a simple transconductor, inverting voltage buffer, and unity-gain current follower are used as active building blocks. Considering the input intrinsic resistance of current follower as useful active filter parameter, the proposed TAM APF employs only a floating capacitor as external passive component. Hence, it is a resistorless circuit. In addition, due to high-impendence voltage input and high-impedance of output current terminal, it is fully cascadable filter realization. SPICE simulation results are included to support the theory. In the design the PTM 90 nm level-7 CMOS process BSIM3v3 parameters with low (+-0.5 V) DC voltages were used.

English abstract

This paper presents a new realization of a first-order transadmittance-mode (TAM) all-pass filter (APF). In the proposed mixed-mode APF a simple transconductor, inverting voltage buffer, and unity-gain current follower are used as active building blocks. Considering the input intrinsic resistance of current follower as useful active filter parameter, the proposed TAM APF employs only a floating capacitor as external passive component. Hence, it is a resistorless circuit. In addition, due to high-impendence voltage input and high-impedance of output current terminal, it is fully cascadable filter realization. SPICE simulation results are included to support the theory. In the design the PTM 90 nm level-7 CMOS process BSIM3v3 parameters with low (+-0.5 V) DC voltages were used.

Keywords

analog signal processing; all-pass filter; current follower; inverting voltage buffer; transconductance; low-voltage; transadmittance-mode circuit

RIV year

2014

Released

04.08.2014

Location

College Station, Texas, USA

ISBN

978-1-4799-4132-2

Book

Proceedings of the 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS 2014)

Pages from

185

Pages to

188

Pages count

4

BibTex


@inproceedings{BUT108785,
  author="Norbert {Herencsár} and Jaroslav {Koton} and Kamil {Vrba} and Oguzhan {Cicekoglu}",
  title="Low-Voltage Fully Cascadable Resistorless Transadmittance-Mode All-Pass Filter",
  annote="This paper presents a new realization of a first-order transadmittance-mode (TAM) all-pass filter (APF). In the proposed mixed-mode APF a simple transconductor, inverting voltage buffer, and unity-gain current follower are used as active building blocks. Considering the input intrinsic resistance of current follower as useful active filter parameter, the proposed TAM APF employs only a floating capacitor as external passive component. Hence, it is a resistorless circuit. In addition, due to high-impendence voltage input and high-impedance of output current terminal, it is fully cascadable filter realization. SPICE simulation results are included to support the theory. In the design the PTM 90 nm level-7 CMOS process BSIM3v3 parameters with low (+-0.5 V) DC voltages were used.",
  booktitle="Proceedings of the 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS 2014)",
  chapter="108785",
  doi="10.1109/MWSCAS.2014.6908383",
  howpublished="electronic, physical medium",
  year="2014",
  month="august",
  pages="185--188",
  type="conference paper"
}