Publication detail

Optimized Architecture of High Order CIC Filters

PRISTACH, M. PAVLÍK, M. HÁZE, J. FUJCIK, L.

Original Title

Optimized Architecture of High Order CIC Filters

English Title

Optimized Architecture of High Order CIC Filters

Type

conference paper

Language

en

Original Abstract

The paper presents an optimized architecture of cascaded integrator-comb (CIC) digital filter structure. The structure is suitable for implementation in application specific integration circuits (ASICs) or field programmable gate arrays (FPGAs). The main advantages of the architecture are higher working frequency, smaller area size and lower power consumption. Software in C++ language was written for automatic filter generation. The software generates fully synthesizable VHDL description of filter, batch file for simulator and test-bench file for automatic filter verification from the filter specification file.

English abstract

The paper presents an optimized architecture of cascaded integrator-comb (CIC) digital filter structure. The structure is suitable for implementation in application specific integration circuits (ASICs) or field programmable gate arrays (FPGAs). The main advantages of the architecture are higher working frequency, smaller area size and lower power consumption. Software in C++ language was written for automatic filter generation. The software generates fully synthesizable VHDL description of filter, batch file for simulator and test-bench file for automatic filter verification from the filter specification file.

Keywords

application specific integration circuits, cascaded integrator-comb filters, hardware description language, Hogenauer filter

RIV year

2013

Released

20.06.2013

Publisher

Lodz University of Technology

Location

Lodz, Poland

ISBN

978-83-63578-01-5

Book

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems

Pages from

263

Pages to

266

Pages count

4

BibTex


@inproceedings{BUT100993,
  author="Marián {Pristach} and Michal {Pavlík} and Jiří {Háze} and Lukáš {Fujcik}",
  title="Optimized Architecture of High Order CIC Filters",
  annote="The paper presents an optimized architecture of cascaded integrator-comb (CIC) digital filter structure. The structure is suitable for implementation in application specific integration circuits (ASICs) or field programmable gate arrays (FPGAs). The main advantages of the architecture are higher working frequency, smaller area size and lower power consumption. Software in C++ language was written for automatic filter generation. The software generates fully synthesizable VHDL description of filter, batch file for simulator and test-bench file for automatic filter verification from the filter specification file.",
  address="Lodz University of Technology",
  booktitle="Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems",
  chapter="100993",
  howpublished="electronic, physical medium",
  institution="Lodz University of Technology",
  year="2013",
  month="june",
  pages="263--266",
  publisher="Lodz University of Technology",
  type="conference paper"
}