Detail publikace

External Sdram Memory in FPGA Based Design

KVÁŠ, M. VALACH, S. ČERVINKA, L.

Originální název

External Sdram Memory in FPGA Based Design

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

Even though amount of memory integrated on the FPGA chip grows, it is sufficient for rather low demanding applications only. Even smaller members of low-cost FPGA family, Spartan 6, have enough logical resources to perform relatively complex functionality, but memory is often the limiting factor. The only solution is to use external memories. From the reliability point of view the external memory introduces to the system new risks in the form of potential hardware malfunction, soft errors in external memory and necessary architectural changes. This paper evaluates additional risks, costs and gains specific for external memories.

Klíčová slova

FPGA, soft-core, soft-errors, fault-tolerance, SDRAM

Autoři

KVÁŠ, M.; VALACH, S.; ČERVINKA, L.

Rok RIV

2011

Vydáno

23. 11. 2011

Nakladatel

DAAAM International

Místo

Vienna, Austria

ISBN

978-3-901509-83-4

Kniha

Annals of DAAAM for 2011 & Proceedings of the 22nd International DAAAM Symposium

ISSN

1726-9679

Periodikum

Inteligent Manufacturing and Automation: Focus on Young Researches and Scientists

Stát

Rakouská republika

Strany od

545

Strany do

546

Strany počet

2

BibTex

@inproceedings{BUT76195,
  author="Marek {Kváš} and Soběslav {Valach} and Luděk {Červinka}",
  title="External Sdram Memory in FPGA Based Design",
  booktitle="Annals of DAAAM for 2011 & Proceedings of the 22nd International DAAAM Symposium",
  year="2011",
  journal="Inteligent Manufacturing and Automation: Focus on Young Researches and Scientists",
  pages="545--546",
  publisher="DAAAM International",
  address="Vienna, Austria",
  isbn="978-3-901509-83-4",
  issn="1726-9679"
}