Detail publikace

A 16-bit Switched-Capacitor Sigma-Delta Modulator Matlab Model Exploiting Two-Step Quantization Process

Originální název

A 16-bit Switched-Capacitor Sigma-Delta Modulator Matlab Model Exploiting Two-Step Quantization Process

Anglický název

A 16-bit Switched-Capacitor Sigma-Delta Modulator Matlab Model Exploiting Two-Step Quantization Process

Jazyk

en

Originální abstrakt

This paper presents a novel architecture of high-order single-stage sigma-delta (ΣΔ) converter for sensor measurement. The two-step quantization technique was utilized to design of novel architecture of sigma-delta; modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability.

Anglický abstrakt

This paper presents a novel architecture of high-order single-stage sigma-delta (ΣΔ) converter for sensor measurement. The two-step quantization technique was utilized to design of novel architecture of sigma-delta; modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability.

BibTex


@inproceedings{BUT24404,
  author="Lukáš {Fujcik} and Radimír {Vrba} and Miroslav {Švéda}",
  title="A 16-bit Switched-Capacitor Sigma-Delta Modulator Matlab Model Exploiting Two-Step Quantization Process",
  annote="This paper presents a novel architecture of high-order single-stage sigma-delta (ΣΔ) converter for sensor measurement. The two-step quantization technique was utilized to design of novel architecture of sigma-delta; modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability.",
  address="Juan Andrade Cetto",
  booktitle="Proceedings Signal Processing, Systems Modeling and Control",
  chapter="24404",
  institution="Juan Andrade Cetto",
  year="2006",
  month="january",
  pages="142",
  publisher="Juan Andrade Cetto",
  type="conference paper"
}