Detail publikace

MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process

Originální název

MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process

Anglický název

MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process

Jazyk

en

Originální abstrakt

This paper presents a novel architecture of highorder single-stage sigma-delta (Σ∆) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of Σ∆ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) Σ∆ modulator was simulated with blocks containing nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages).

Anglický abstrakt

This paper presents a novel architecture of highorder single-stage sigma-delta (Σ∆) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of Σ∆ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) Σ∆ modulator was simulated with blocks containing nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages).

BibTex


@inproceedings{BUT18706,
  author="Lukáš {Fujcik}",
  title="MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process",
  annote="This paper presents a novel architecture of highorder single-stage sigma-delta (Σ∆) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of Σ∆ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was
designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) Σ∆ modulator was simulated with blocks containing nonidealities,
such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages).",
  address="Suvisoft Oy ltd., Finland",
  booktitle="Second International Symposium on Communications, Control and Signal Processing, ISCCSP 2006",
  chapter="18706",
  institution="Suvisoft Oy ltd., Finland",
  year="2006",
  month="january",
  pages="87",
  publisher="Suvisoft Oy ltd., Finland",
  type="conference paper"
}