Detail publikace

Switched-current RSD analog-to-digital converter

Originální název

Switched-current RSD analog-to-digital converter

Anglický název

Switched-current RSD analog-to-digital converter

Jazyk

en

Originální abstrakt

RSD algorithm was implemented to cycles or pipelined switched-current analog-to-digital converter (ADC), where resolution of sub converter is 1,5 bit. This implementation is well known. Implementation of RSD algorithm to ADC with 2,5-bit sub converter is presented in this paper. The most critical blocs in classical ADC are reference currents sources and comparators. Usage of this algorithm decrease inaccuracy of these blocks impact on accuracy of full ADC. Same current sources can by designed using clasicall current mirors and same current sources must by designed using switched current second generation memory cells.

Anglický abstrakt

RSD algorithm was implemented to cycles or pipelined switched-current analog-to-digital converter (ADC), where resolution of sub converter is 1,5 bit. This implementation is well known. Implementation of RSD algorithm to ADC with 2,5-bit sub converter is presented in this paper. The most critical blocs in classical ADC are reference currents sources and comparators. Usage of this algorithm decrease inaccuracy of these blocks impact on accuracy of full ADC. Same current sources can by designed using clasicall current mirors and same current sources must by designed using switched current second generation memory cells.

BibTex


@inproceedings{BUT12019,
  author="Michal {Skočdopole} and Radimír {Vrba} and Lukáš {Fujcik} and Jiří {Háze}",
  title="Switched-current RSD analog-to-digital converter",
  annote="RSD algorithm was implemented to cycles or pipelined switched-current analog-to-digital converter (ADC), where resolution of sub converter is 1,5 bit. This implementation is well known. Implementation of RSD algorithm to ADC with 2,5-bit sub converter is presented in this paper. The most critical blocs in classical ADC are reference currents sources and comparators. Usage of this algorithm decrease inaccuracy of these blocks impact on accuracy of full ADC. Same current sources can by designed using clasicall current mirors and same current sources must by designed using switched current second generation memory cells.",
  address="Technological Institute of Crete, Greece",
  booktitle="Socrates Workshop 2004. Intensive Training Programme in Electronic System Design. Proceedings.",
  chapter="12019",
  institution="Technological Institute of Crete, Greece",
  year="2004",
  month="january",
  pages="67",
  publisher="Technological Institute of Crete, Greece",
  type="conference paper"
}