Detail publikace

Enhanced Architecture of FIR Filters Using Block Memories

Originální název

Enhanced Architecture of FIR Filters Using Block Memories

Anglický název

Enhanced Architecture of FIR Filters Using Block Memories

Jazyk

en

Originální abstrakt

The paper presents an enhanced architecture of finite impulse response digital filters. The proposed architecture contains one multiply-accumulate unit and random access memory to store data. The architecture utilizes serial calculation to achieve minimum requirements on area. The architecture is suitable for implementation in application specific integrated circuits and field programmable gate arrays. The main advantages of the architecture are higher operating frequency, lower power consumption and smaller area utilization in particular cases.

Anglický abstrakt

The paper presents an enhanced architecture of finite impulse response digital filters. The proposed architecture contains one multiply-accumulate unit and random access memory to store data. The architecture utilizes serial calculation to achieve minimum requirements on area. The architecture is suitable for implementation in application specific integrated circuits and field programmable gate arrays. The main advantages of the architecture are higher operating frequency, lower power consumption and smaller area utilization in particular cases.

BibTex


@inproceedings{BUT115938,
  author="Marián {Pristach} and Vojtěch {Dvořák} and Lukáš {Fujcik}",
  title="Enhanced Architecture of FIR Filters Using Block Memories",
  annote="The paper presents an enhanced architecture of finite impulse response digital filters. The proposed architecture contains one multiply-accumulate unit and random access memory to store data. The architecture utilizes serial calculation to achieve minimum requirements on area. The architecture is suitable for implementation in application specific integrated circuits and field programmable gate arrays. The main advantages of the architecture are higher operating frequency, lower power consumption and smaller area utilization in particular cases.",
  address="Institute of Electronics Silesian University of Technology",
  booktitle="13th IFAC Conference on Programmable Devices and Embedded Systems - PDeS 2015",
  chapter="115938",
  doi="10.1016/j.ifacol.2015.07.052",
  howpublished="online",
  institution="Institute of Electronics Silesian University of Technology",
  number="4",
  year="2015",
  month="may",
  pages="306--311",
  publisher="Institute of Electronics Silesian University of Technology",
  type="conference paper"
}