Detail publikace

Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA

Originální název

Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA

Anglický název

Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA

Jazyk

en

Originální abstrakt

In recent years, many techniques for self repairing of the systems implemented in FPGA were developed and presented. The basic problem of these approaches is bigger overhead of unit for controlling of the partial reconfiguration process. Moreover, these solutions generally are not implemented as fault tolerant system. In this paper, a small and flexible generic partial dynamic reconfiguration controller implemented inside FPGA is presented. The basic architecture and usage of the controller in the FPGA-based fault tolerant structure are described. The implementation of controller as fault tolerant component is described as well. The basic features and synthesis results of controller for Xilinx FPGA and comparison with MicroBlaze solution are presented.

Anglický abstrakt

In recent years, many techniques for self repairing of the systems implemented in FPGA were developed and presented. The basic problem of these approaches is bigger overhead of unit for controlling of the partial reconfiguration process. Moreover, these solutions generally are not implemented as fault tolerant system. In this paper, a small and flexible generic partial dynamic reconfiguration controller implemented inside FPGA is presented. The basic architecture and usage of the controller in the FPGA-based fault tolerant structure are described. The implementation of controller as fault tolerant component is described as well. The basic features and synthesis results of controller for Xilinx FPGA and comparison with MicroBlaze solution are presented.

BibTex


@inproceedings{BUT34857,
  author="Martin {Straka} and Jan {Kaštil} and Zdeněk {Kotásek}",
  title="Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA",
  annote="In recent years, many techniques for self repairing of the systems implemented in
FPGA were developed and presented. The basic problem of these approaches is
bigger overhead of unit for controlling of the partial reconfiguration process.
Moreover, these solutions generally are not implemented as fault tolerant system.
In this paper, a small and flexible generic partial dynamic reconfiguration
controller implemented inside FPGA is presented. The basic architecture and usage
of the controller in the FPGA-based fault tolerant structure are described. The
implementation of controller as fault tolerant component is described as well.
The basic features and synthesis results of controller for Xilinx FPGA and
comparison with MicroBlaze solution are presented.",
  address="IEEE Computer Society",
  booktitle="NORCHIP 2010",
  chapter="34857",
  edition="NEUVEDEN",
  howpublished="print",
  institution="IEEE Computer Society",
  year="2010",
  month="october",
  pages="1--4",
  publisher="IEEE Computer Society",
  type="conference paper"
}