Detail publikace

Hardware Unit for Motion Estimation

Originální název

Hardware Unit for Motion Estimation

Anglický název

Hardware Unit for Motion Estimation

Jazyk

en

Originální abstrakt

One of the most time-consuming computational load in high-speed video systems is motion estimation being used as a main part of the inter-frame video compression. In this paper basic approaches to motion estimation and matching criteria used are discussed. These two concepts represent the main computational load of the compression process. As the most promising concept one-dimensional hierarchical search with block-matching algorithms is proposed. Then a hardware architecture is designed with application of parallelization and pipelining to achieve high speed and low hardware cost.

Anglický abstrakt

One of the most time-consuming computational load in high-speed video systems is motion estimation being used as a main part of the inter-frame video compression. In this paper basic approaches to motion estimation and matching criteria used are discussed. These two concepts represent the main computational load of the compression process. As the most promising concept one-dimensional hierarchical search with block-matching algorithms is proposed. Then a hardware architecture is designed with application of parallelization and pipelining to achieve high speed and low hardware cost.

BibTex


@inproceedings{BUT25330,
  author="Vladimír {Drábek}",
  title="Hardware Unit for Motion Estimation",
  annote="One of the most time-consuming computational load in high-speed video systems is
motion estimation being used as a main part of the inter-frame video compression.
In this paper basic approaches to motion estimation and matching criteria used
are discussed. These two concepts represent the main computational load of the
compression process. As the most promising concept one-dimensional hierarchical
search with block-matching algorithms is proposed. Then a hardware architecture
is designed with application of parallelization and pipelining to achieve high
speed and low hardware cost.",
  address="Faculty of Electrical Engineering and Communication BUT",
  booktitle="Electronic Devices and Systems",
  chapter="25330",
  howpublished="print",
  institution="Faculty of Electrical Engineering and Communication BUT",
  year="2007",
  month="september",
  pages="17--21",
  publisher="Faculty of Electrical Engineering and Communication BUT",
  type="conference paper"
}