Detail publikace

On Distribution of Testability Values in Scan-Layout State-Space

STRNADEL, J.

Originální název

On Distribution of Testability Values in Scan-Layout State-Space

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

In the paper, it is shown how are testability values distributed within the scan-layout state-space for particular digital circuit. The goal of the paper was to approve or dismiss our hypothesis that the more registers are included in greater number of multiple scan-chains within particular scan-layout, the better testability properties correspond to the scan-layout.

Klíčová slova

digital circuit diagnostics, register-transfer level, circuit data-path, testability analysis, design for testability, testability improvements, scan technique

Autoři

STRNADEL, J.

Rok RIV

2006

Vydáno

19. 9. 2006

Nakladatel

The University of Technology Košice

Místo

Košice

ISBN

80-8073-598-0

Kniha

Proceedings of the 7th International Scientific Conference on Electronic Computers and Informatics

Strany od

308

Strany do

313

Strany počet

6

BibTex

@inproceedings{BUT22271,
  author="Josef {Strnadel}",
  title="On Distribution of Testability Values in Scan-Layout State-Space",
  booktitle="Proceedings of the 7th International Scientific Conference on Electronic Computers and Informatics",
  year="2006",
  pages="308--313",
  publisher="The University of Technology Košice",
  address="Košice",
  isbn="80-8073-598-0"
}