Detail publikace

A 0.5-V Multiple-Input Bulk-Driven OTA in 0.18-mu m CMOS

KHATEB, F. KULEJ, T. AKBARI, M. KEA-TIONG, T.

Originální název

A 0.5-V Multiple-Input Bulk-Driven OTA in 0.18-mu m CMOS

Typ

článek v časopise ve Web of Science, Jimp

Jazyk

angličtina

Originální abstrakt

This article presents the experimental results for a multiple-input operational transconductance amplifier (MI-OTA). To achieve extended linearity under 0.5-V low voltage supply, the circuit employs three linearization techniques: the bulk-driven (BD), the source degeneration, and the input voltage attenuation created by the MI metal-oxide-semiconductor transistor technique (MI-MOST). Although the linearization techniques result in reduced dc gain, the self-cascode transistors are used to boost the gain of the MI-OTA. Furthermore, the MI-MOST simplifies the internal structure of the OTA and may reduce the complexity of the applications. The MI-OTA operates in the subthreshold region and offers tunability by a bias current in the nanoampere range. The circuit is capable to work with 0.5-V supply voltage while consuming 24.77 nW. The circuit was fabricated using the 0.18- mu m Taiwan Semiconductor Manufacturing Company (TSMC) CMOS technology and it occupies a 0.01153-mm(2) silicon area. Intensive simulation and experimental results confirm the benefits and robustness of the design.

Klíčová slova

Bulk-driven (BD) amplifier; linear operational transconductance amplifier (OTA); low power; low voltage; transconductance amplifier

Autoři

KHATEB, F.; KULEJ, T.; AKBARI, M.; KEA-TIONG, T.

Vydáno

7. 10. 2022

Nakladatel

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

Místo

PISCATAWAY

ISSN

1063-8210

Periodikum

IEEE Trans. on VLSI Systems.

Ročník

30

Číslo

11

Stát

Spojené státy americké

Strany od

1739

Strany do

1747

Strany počet

9

URL

BibTex

@article{BUT179454,
  author="Fabian {Khateb} and Tomasz {Kulej} and Meysam {Akbari} and Tang {Kea-Tiong}",
  title="A 0.5-V Multiple-Input Bulk-Driven OTA in 0.18-mu m CMOS",
  journal="IEEE Trans. on VLSI Systems.",
  year="2022",
  volume="30",
  number="11",
  pages="1739--1747",
  doi="10.1109/TVLSI.2022.3203148",
  issn="1063-8210",
  url="https://ieeexplore.ieee.org/document/9894730"
}