Detail publikace

Balanced-Output CCCFOA and Its Utilization in Grounded Inductance Simulator with Various Orders

Originální název

Balanced-Output CCCFOA and Its Utilization in Grounded Inductance Simulator with Various Orders

Anglický název

Balanced-Output CCCFOA and Its Utilization in Grounded Inductance Simulator with Various Orders

Jazyk

en

Originální abstrakt

In this paper, a new realization of current-controlled current feedback operational amplifier with balanced voltage outputs (BO-CCCFOA) is presented. A resistorless grounded lossless positive inductance simulator (PIS) using two BO-CCCFOAs and a grounded capacitor is reported. The resulting equivalent inductance value of PIS can be adjusted either via change of input intrinsic resistance of BO-CCCFOAs by means of biasing currents or by order of fractional-order capacitor (FoC). FoCs of order γ = (0.25; 0.5; 0.75; 1) were emulated via 5th-order Foster II RC network and values optimized using modified least squares quadratic (MLSQ) method. In frequency range 30 kHz - 30 MHz the obtained phase angle deviation of FoCs and mean values of corresponding relative phase error are below ±1 degree and ±4.3%, respectively. Considering the bandwidth for phase angle deviation less than 3 degree, the proposed fractional-order PIS operates over two decades. The behavior of the PIS circuit with various orders was tested via implementation in RLC ladder prototype of voltage-mode high-pass filter. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±1 V supply voltages.

Anglický abstrakt

In this paper, a new realization of current-controlled current feedback operational amplifier with balanced voltage outputs (BO-CCCFOA) is presented. A resistorless grounded lossless positive inductance simulator (PIS) using two BO-CCCFOAs and a grounded capacitor is reported. The resulting equivalent inductance value of PIS can be adjusted either via change of input intrinsic resistance of BO-CCCFOAs by means of biasing currents or by order of fractional-order capacitor (FoC). FoCs of order γ = (0.25; 0.5; 0.75; 1) were emulated via 5th-order Foster II RC network and values optimized using modified least squares quadratic (MLSQ) method. In frequency range 30 kHz - 30 MHz the obtained phase angle deviation of FoCs and mean values of corresponding relative phase error are below ±1 degree and ±4.3%, respectively. Considering the bandwidth for phase angle deviation less than 3 degree, the proposed fractional-order PIS operates over two decades. The behavior of the PIS circuit with various orders was tested via implementation in RLC ladder prototype of voltage-mode high-pass filter. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±1 V supply voltages.

Plný text v Digitální knihovně

BibTex


@inproceedings{BUT148883,
  author="Norbert {Herencsár}",
  title="Balanced-Output CCCFOA and Its Utilization in Grounded Inductance Simulator with Various Orders",
  annote="In this paper, a new realization of current-controlled current feedback operational amplifier with balanced voltage outputs (BO-CCCFOA) is presented. A resistorless grounded lossless positive inductance simulator (PIS) using two BO-CCCFOAs and a grounded capacitor is reported. The resulting equivalent inductance value of PIS can be adjusted either via change of input intrinsic resistance of BO-CCCFOAs by means of biasing currents or by order of fractional-order capacitor (FoC). FoCs of order γ = (0.25; 0.5; 0.75; 1) were emulated via 5th-order Foster II RC network and values optimized using modified least squares quadratic (MLSQ) method. In frequency range 30 kHz - 30 MHz the obtained phase angle deviation of FoCs and mean values of corresponding relative phase error are below ±1 degree and ±4.3%, respectively. Considering the bandwidth for phase angle deviation less than 3 degree, the proposed fractional-order PIS operates over two decades. The behavior of the PIS circuit with various orders was tested via implementation in RLC ladder prototype of voltage-mode high-pass filter. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±1 V supply voltages.",
  address="IEEE",
  booktitle="Proceedings of the 2018 41st International Conference on Telecommunications and Signal Processing (TSP)",
  chapter="148883",
  doi="10.1109/TSP.2018.8441349",
  howpublished="online",
  institution="IEEE",
  year="2018",
  month="july",
  pages="188--191",
  publisher="IEEE",
  type="conference paper"
}