Detail publikace

RSD Algorithm Implementation to Semiflash ADC

SKOČDOPOLE, M., VRBA, R., HÁZE, J., FUJCIK, L.

Originální název

RSD Algorithm Implementation to Semiflash ADC

Typ

článek v časopise - ostatní, Jost

Jazyk

angličtina

Originální abstrakt

RSD algorithm was implemented to cycles or pipelined switched-current analog-to-digital converter (ADC), where resolution of sub-converter is 1,5 bit. This implementation is well known. Implementation of RSD algorithm to ADC with 2,5-bit sub-converter is presented in this paper. The most critical blocs in classical ADC are reference currents sources and comparators. Usage of this algorithm decrease inaccuracy of these blocks impact on accuracy of full ADC.

Klíčová slova

Analog-to-Digital Converter, ADC, RSD Algorithm, Switched-Current Technique, Semiflash ADC

Autoři

SKOČDOPOLE, M., VRBA, R., HÁZE, J., FUJCIK, L.

Rok RIV

2004

Vydáno

1. 1. 2004

Nakladatel

WSEAS

Místo

Rio de Janeiro

ISSN

1109-2734

Periodikum

WSEAS Transactions on Circuits

Ročník

2004

Číslo

9

Stát

Řecká republika

Strany od

1971

Strany do

1973

Strany počet

3

BibTex

@article{BUT42227,
  author="Michal {Skočdopole} and Radimír {Vrba} and Jiří {Háze} and Lukáš {Fujcik}",
  title="RSD Algorithm Implementation to Semiflash ADC",
  journal="WSEAS Transactions on Circuits",
  year="2004",
  volume="2004",
  number="9",
  pages="3",
  issn="1109-2734"
}