Detail publikace
Retargetable Multi-level Debugging in HW/SW Codesign
KŘOUSTEK, J. PŘIKRYL, Z. KOLÁŘ, D. HRUŠKA, T.
Originální název
Retargetable Multi-level Debugging in HW/SW Codesign
Anglický název
Retargetable Multi-level Debugging in HW/SW Codesign
Jazyk
en
Originální abstrakt
Debugging is a standard part of an embedded system design process. The debugger is used for a target application debugging and for a testing of the designed system. The target application debugging can be performed either on a statement-accurate level (i.e. source-language level debugging) or on an instruction-accurate level (i.e. assembly-language level debugging). The architecture design debugging is done on a cycle-accurate level. Nowadays embedded systems are often parallel-based. Therefore, it is important to allow debugging of systems with more than one application-specific instruction set processors (ASIP). Since the current trend of ASIP design is focused on automatic tool-chain generation, the debugger must be retargetable to arbitrary architecture. In this paper, we present the concept of an automatically generated multi-level retargetable debugger. This debugger can operate on each of the previously mentioned levels and it allows debugging of multiprocessor systems. The experimental results can be found at the end of the paper.
Anglický abstrakt
Debugging is a standard part of an embedded system design process. The debugger is used for a target application debugging and for a testing of the designed system. The target application debugging can be performed either on a statement-accurate level (i.e. source-language level debugging) or on an instruction-accurate level (i.e. assembly-language level debugging). The architecture design debugging is done on a cycle-accurate level. Nowadays embedded systems are often parallel-based. Therefore, it is important to allow debugging of systems with more than one application-specific instruction set processors (ASIP). Since the current trend of ASIP design is focused on automatic tool-chain generation, the debugger must be retargetable to arbitrary architecture. In this paper, we present the concept of an automatically generated multi-level retargetable debugger. This debugger can operate on each of the previously mentioned levels and it allows debugging of multiprocessor systems. The experimental results can be found at the end of the paper.
Dokumenty
BibTex
@inproceedings{BUT76308,
author="Jakub {Křoustek} and Zdeněk {Přikryl} and Dušan {Kolář} and Tomáš {Hruška}",
title="Retargetable Multi-level Debugging in HW/SW Codesign",
annote="Debugging is a standard part of an embedded system design process. The debugger
is used for a target application debugging and for a testing of the designed
system. The target application debugging can be performed either on
a statement-accurate level (i.e. source-language level debugging) or on an
instruction-accurate level (i.e. assembly-language level debugging). The
architecture design debugging is done on a cycle-accurate level. Nowadays
embedded systems are often parallel-based. Therefore, it is important to allow
debugging of systems with more than one application-specific instruction set
processors (ASIP). Since the current trend of ASIP design is focused on automatic
tool-chain generation, the debugger must be retargetable to arbitrary
architecture. In this paper, we present the concept of an automatically generated
multi-level retargetable debugger. This debugger can operate on each of the
previously mentioned levels and it allows debugging of multiprocessor systems.
The experimental results can be found at the end of the paper.",
address="Institute of Electrical and Electronics Engineers",
booktitle="The 23rd International Conference on Microelectronics (ICM 2011)",
chapter="76308",
doi="10.1109/ICM.2011.6177413",
edition="NEUVEDEN",
howpublished="electronic, physical medium",
institution="Institute of Electrical and Electronics Engineers",
year="2011",
month="december",
pages="1--6",
publisher="Institute of Electrical and Electronics Engineers",
type="conference paper"
}