Detail publikace

Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores

PEČENKA, T., KOTÁSEK, Z., STRNADEL, J.

Originální název

Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores

Anglický název

Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores

Jazyk

en

Originální abstrakt

A new methodology of selecting registers into scan chain is presented. It is based on the identification of testable cores.  The methodology is supposed to be used preferably for pipelined circuits consisting of a high number of stages. In the paper, the idea of testable cores is illustrated and defined. The method based on a genetic algorithm is described and verified on several typical pipelined circuits. Experimental results are discussed and summarized in the table. At the end of the paper, conclusions and future research perspectives are indicated.

Anglický abstrakt

A new methodology of selecting registers into scan chain is presented. It is based on the identification of testable cores.  The methodology is supposed to be used preferably for pipelined circuits consisting of a high number of stages. In the paper, the idea of testable cores is illustrated and defined. The method based on a genetic algorithm is described and verified on several typical pipelined circuits. Experimental results are discussed and summarized in the table. At the end of the paper, conclusions and future research perspectives are indicated.

Dokumenty

BibTex 


@inproceedings{BUT17148,
  author="Tomáš {Pečenka} and Zdeněk {Kotásek} and Josef {Strnadel}",
  title="Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores",
  annote="A new methodology of selecting registers into scan chain is presented. It is based on the identification of testable cores.  The methodology is supposed to be used preferably for pipelined circuits consisting of a high number of stages. In the paper, the idea of testable cores is illustrated and defined. The method based on a genetic algorithm is described and verified on several typical pipelined circuits. Experimental results are discussed and summarized in the table. At the end of the paper, conclusions and future research perspectives are indicated.",
  address="Slovak Academy of Science",
  booktitle="Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems",
  chapter="17148",
  institution="Slovak Academy of Science",
  year="2004",
  month="april",
  pages="99--104",
  publisher="Slovak Academy of Science",
  type="conference paper"
}