Detail publikace

0.3V Bulk-driven current conveyor

KHATEB, F. KULEJ, T. KUMNGERN, M.

Originální název

0.3V Bulk-driven current conveyor

Anglický název

0.3V Bulk-driven current conveyor

Jazyk

en

Originální abstrakt

This paper presents the design and the experimental results of a sub 0.5 V bulk-driven (BD) current conveyor (CCII) using 0.18 µm TSMC CMOS technology with total chip area of 0.0134 mm2. All transistors are biased in subthreshold region for low-voltage low-power operation and the input transistors are controlled from their bulk terminals for rail-to-rail input voltage range. The circuit is designed to work with voltage supply (VDD = 0.3V) which is much lower than the threshold voltage of the MOS transistor (VTH=0.5V) while consuming 19 nW of power. The measurement results confirm the proper function of the proposed circuit.

Anglický abstrakt

This paper presents the design and the experimental results of a sub 0.5 V bulk-driven (BD) current conveyor (CCII) using 0.18 µm TSMC CMOS technology with total chip area of 0.0134 mm2. All transistors are biased in subthreshold region for low-voltage low-power operation and the input transistors are controlled from their bulk terminals for rail-to-rail input voltage range. The circuit is designed to work with voltage supply (VDD = 0.3V) which is much lower than the threshold voltage of the MOS transistor (VTH=0.5V) while consuming 19 nW of power. The measurement results confirm the proper function of the proposed circuit.

Plný text v Digitální knihovně

http://hdl.handle.net/11012/173200

Dokumenty

BibTex 


@article{BUT156873,
  author="Fabian {Khateb} and Tomasz {Kulej} and Montree {Kumngern}",
  title="0.3V Bulk-driven current conveyor",
  annote="This paper presents the design and the experimental results of a sub 0.5 V bulk-driven (BD) current conveyor (CCII) using 0.18 µm TSMC CMOS technology with total chip area of 0.0134 mm2. All transistors are biased in subthreshold region for low-voltage low-power operation and the input transistors are controlled from their bulk terminals for rail-to-rail input voltage range. The circuit is designed to work with voltage supply (VDD = 0.3V) which is much lower than the threshold voltage of the MOS transistor (VTH=0.5V) while consuming 19 nW of power. The measurement results confirm the proper function of the proposed circuit.",
  address="IEEE",
  chapter="156873",
  doi="10.1109/ACCESS.2019.2916897",
  howpublished="print",
  institution="IEEE",
  number="1, IF: 4.098",
  volume="7",
  year="2019",
  month="may",
  pages="65122--65128",
  publisher="IEEE",
  type="journal article in Web of Science"
}