Detail publikace

Extremely low-voltage bulk-driven tunable transconductor

Originální název

Extremely low-voltage bulk-driven tunable transconductor

Anglický název

Extremely low-voltage bulk-driven tunable transconductor

Jazyk

en

Originální abstrakt

A design solution for bulk-driven tunable transconductor capable to work under extremely low supply/consumption with rail-to-rail input common-mode range is presented in this work. The proposed transconductor topology consists of six bulk-driven CMOS inverters and it uses a very simple biasing circuit for the transconductance tuning. The design robustness was verified for 0.5 and 0.25 V power supplies offering the advantages of the current controlled input transconductance. For 0.5 V power supply the proposed transconductor has 0.075 to 10.2 µS transconductance tuning range, input referred intercept point IP3 = 1.81 V and 4.62 MHz bandwidth for 3 µA current consumption. The design robustness of the tunable transconductor was verified by means of computer simulation using triple-well 0.18 µm CMOS process.

Anglický abstrakt

A design solution for bulk-driven tunable transconductor capable to work under extremely low supply/consumption with rail-to-rail input common-mode range is presented in this work. The proposed transconductor topology consists of six bulk-driven CMOS inverters and it uses a very simple biasing circuit for the transconductance tuning. The design robustness was verified for 0.5 and 0.25 V power supplies offering the advantages of the current controlled input transconductance. For 0.5 V power supply the proposed transconductor has 0.075 to 10.2 µS transconductance tuning range, input referred intercept point IP3 = 1.81 V and 4.62 MHz bandwidth for 3 µA current consumption. The design robustness of the tunable transconductor was verified by means of computer simulation using triple-well 0.18 µm CMOS process.

BibTex


@article{BUT124195,
  author="Fabian {Khateb} and Tomasz {Kulej} and Spyridon {Vlassis}",
  title="Extremely low-voltage bulk-driven tunable transconductor",
  annote="A design solution for bulk-driven tunable transconductor capable to work under extremely low supply/consumption with rail-to-rail input common-mode range is presented in this work. The proposed transconductor topology consists of six bulk-driven CMOS inverters and it uses a very simple biasing circuit for the transconductance tuning. The design robustness was verified for 0.5 and 0.25 V power supplies offering the advantages of the current controlled input transconductance. For 0.5 V power supply the proposed transconductor has 0.075 to 10.2 µS transconductance tuning range, input referred intercept point IP3 = 1.81 V and 4.62 MHz bandwidth for 3 µA current consumption. The design robustness of the tunable transconductor was verified by means of computer simulation using triple-well 0.18 µm CMOS process.",
  address="SPRINGER BIRKHAUSER",
  chapter="124195",
  doi="10.1007/s00034-016-0329-0",
  howpublished="print",
  institution="SPRINGER BIRKHAUSER",
  number="2,  IF: 1.694",
  volume="2017 (36)",
  year="2017",
  month="january",
  pages="511--524",
  publisher="SPRINGER BIRKHAUSER",
  type="journal article in Web of Science"
}