Detail publikace

Reflecting RTOS Model During WCET Timing Analysis: MSP430/FreeRTOS Case Study

Originální název

Reflecting RTOS Model During WCET Timing Analysis: MSP430/FreeRTOS Case Study

Anglický název

Reflecting RTOS Model During WCET Timing Analysis: MSP430/FreeRTOS Case Study

Jazyk

en

Originální abstrakt

The determination of the execution time upper bound, commonly called Worst-Case Execution Time (WCET), is a necessary step in the development and validation process for real-time systems. The WCET analysis techniques can be classified as static or dynamic. While a high-level language code suffices for the static techniques, for a precise WCET analysis a target architecture or its authentic simulator able to run the final machine-level code of an analyzed application is needed by the dynamic techniques. In the paper, we have decided not only to present a novel hybrid timing analysis technique, but also to show its practical applicability in the area of WCET analysis over particular embedded architecture (MSP430) and real-time operating system (FreeRTOS). Novelty of the presented method can be seen in the fact the operating system model is reflected during the analysis in order to facilitate the process of derivating schedulability test formulas, create detail task/stack analysis etc. Applicability of the method was tested using the MSPsim simulator of the MSP430 architecture.

Anglický abstrakt

The determination of the execution time upper bound, commonly called Worst-Case Execution Time (WCET), is a necessary step in the development and validation process for real-time systems. The WCET analysis techniques can be classified as static or dynamic. While a high-level language code suffices for the static techniques, for a precise WCET analysis a target architecture or its authentic simulator able to run the final machine-level code of an analyzed application is needed by the dynamic techniques. In the paper, we have decided not only to present a novel hybrid timing analysis technique, but also to show its practical applicability in the area of WCET analysis over particular embedded architecture (MSP430) and real-time operating system (FreeRTOS). Novelty of the presented method can be seen in the fact the operating system model is reflected during the analysis in order to facilitate the process of derivating schedulability test formulas, create detail task/stack analysis etc. Applicability of the method was tested using the MSPsim simulator of the MSP430 architecture.

BibTex


@article{BUT98564,
  author="Josef {Strnadel} and Peter {Rajnoha}",
  title="Reflecting RTOS Model During WCET Timing Analysis: MSP430/FreeRTOS Case Study",
  annote="The determination of the execution time upper bound, commonly called Worst-Case
Execution Time (WCET), is a necessary step in the development and validation
process for real-time systems. The WCET analysis techniques can be classified as
static or dynamic. While a high-level language code suffices for the static
techniques, for a precise WCET analysis a target architecture or its authentic
simulator able to run the final machine-level code of an analyzed application is
needed by the dynamic techniques. In the paper, we have decided not only to
present a novel hybrid timing analysis technique, but also to show its practical
applicability in the area of WCET analysis over particular embedded architecture
(MSP430) and real-time operating system (FreeRTOS). Novelty of the presented
method can be seen in the fact the operating system model is reflected during the
analysis in order to facilitate the process of derivating schedulability test
formulas, create detail task/stack analysis etc. Applicability of the method was
tested using the MSPsim simulator of the MSP430 architecture.",
  address="NEUVEDEN",
  chapter="98564",
  doi="10.2478/v10198-012-0041-3",
  edition="NEUVEDEN",
  howpublished="print",
  institution="NEUVEDEN",
  number="4",
  volume="12",
  year="2012",
  month="december",
  pages="17--29",
  publisher="NEUVEDEN",
  type="journal article - other"
}