Detail publikace
A New Embedded Platform for Rapid Development of Networking Applications
KOŘENEK, J. KORČEK, P. KOŠAŘ, V. ŽÁDNÍK, M. VIKTORIN, J.
Originální název
A New Embedded Platform for Rapid Development of Networking Applications
Anglický název
A New Embedded Platform for Rapid Development of Networking Applications
Jazyk
en
Originální abstrakt
NetFPGA-1G has shown its potential in enabling fast traffic processing while introducing no packet loss and minimal delay. Now it is time to scale down in order to enable a massive deployment of the FPGA solutions in networking. We propose and build a low-cost and low-power platform which is be capable of hosting embedded applications with FPGA support. Such a platform might enable faster deployment of new ideas in networking and might prove useful for large-scale experiments (stacks of platforms) as its size, power consumption and cost are expected to be ten times lower of the NetFPGA-cube. It is recognized that the FPGA coupled with the host processor comprises a powerful platform for network traffic processing. The logic of such a solution is clear. Computational intensive tasks are handled by the FPGA logic whereas more complex tasks by the processor. The proposed platform aims at such a design in which the FPGA and the processor are even more tightly coupled together on a single die SoC solution. As a proof of this concept, we build a platform called uG4-150. Its FPGA hosts a synthesized softcore processor (e.g. Xilinx MicroBlaze). But our final goal is to utilize the hardcore processor (e.g. ARM-based) integrated with the FPGA such as Xilinx Zynq.
Anglický abstrakt
NetFPGA-1G has shown its potential in enabling fast traffic processing while introducing no packet loss and minimal delay. Now it is time to scale down in order to enable a massive deployment of the FPGA solutions in networking. We propose and build a low-cost and low-power platform which is be capable of hosting embedded applications with FPGA support. Such a platform might enable faster deployment of new ideas in networking and might prove useful for large-scale experiments (stacks of platforms) as its size, power consumption and cost are expected to be ten times lower of the NetFPGA-cube. It is recognized that the FPGA coupled with the host processor comprises a powerful platform for network traffic processing. The logic of such a solution is clear. Computational intensive tasks are handled by the FPGA logic whereas more complex tasks by the processor. The proposed platform aims at such a design in which the FPGA and the processor are even more tightly coupled together on a single die SoC solution. As a proof of this concept, we build a platform called uG4-150. Its FPGA hosts a synthesized softcore processor (e.g. Xilinx MicroBlaze). But our final goal is to utilize the hardcore processor (e.g. ARM-based) integrated with the FPGA such as Xilinx Zynq.
Dokumenty
BibTex
@inproceedings{BUT97024,
author="Jan {Kořenek} and Pavol {Korček} and Vlastimil {Košař} and Martin {Žádník} and Jan {Viktorin}",
title="A New Embedded Platform for Rapid Development of Networking Applications",
annote="NetFPGA-1G has shown its potential in enabling fast traffic processing while
introducing no packet loss and minimal delay. Now it is time to scale down in
order to enable a massive deployment of the FPGA solutions in networking. We
propose and build a low-cost and low-power platform which is be capable of
hosting embedded applications with FPGA support. Such a platform might enable
faster deployment of new ideas in networking and might prove useful for
large-scale experiments (stacks of platforms) as its size, power consumption and
cost are expected to be ten times lower of the NetFPGA-cube. It is recognized
that the FPGA coupled with the host processor comprises a powerful platform for
network traffic processing. The logic of such a solution is clear. Computational
intensive tasks are handled by the FPGA logic whereas more complex tasks by the
processor. The proposed platform aims at such a design in which the FPGA and the
processor are even more tightly coupled together on a single die SoC solution.
As a proof of this concept, we build a platform called uG4-150. Its FPGA hosts
a synthesized softcore processor (e.g. Xilinx MicroBlaze). But our final goal is
to utilize the hardcore processor (e.g. ARM-based) integrated with the FPGA such
as Xilinx Zynq.",
address="IEEE Computer Society",
booktitle="Proceedings of the 2012 Seventh ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2012)",
chapter="97024",
doi="10.1145/2396556.2396573",
edition="NEUVEDEN",
howpublished="electronic, physical medium",
institution="IEEE Computer Society",
year="2012",
month="october",
pages="81--82",
publisher="IEEE Computer Society",
type="conference paper"
}