Detail publikace

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

MIČULKA, L. KOTÁSEK, Z.

Originální název

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

Anglický název

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

Jazyk

en

Originální abstrakt

This paper is focused to present the methods of design synchronization after the partial dynamic reconfiguration of FPGA and also there was introduced a new method inspired from one widely used.

Anglický abstrakt

This paper is focused to present the methods of design synchronization after the partial dynamic reconfiguration of FPGA and also there was introduced a new method inspired from one widely used.

Dokumenty

BibTex


@inproceedings{BUT97023,
  author="Lukáš {Mičulka} and Zdeněk {Kotásek}",
  title="Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System",
  annote="This paper is focused to present the methods of design synchronization after the
partial dynamic reconfiguration of FPGA and also there was introduced a new
method inspired from one widely used.",
  address="IEEE Computer Society",
  booktitle="15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools",
  chapter="97023",
  edition="NEUVEDEN",
  howpublished="print",
  institution="IEEE Computer Society",
  year="2012",
  month="june",
  pages="20--21",
  publisher="IEEE Computer Society",
  type="conference paper"
}