Detail publikace

A SAT-based Fitness Function for Evolutionary Optimization of Polymorphic Circuits

SEKANINA, L. VAŠÍČEK, Z.

Originální název

A SAT-based Fitness Function for Evolutionary Optimization of Polymorphic Circuits

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

Multifunctional (or polymorphic) gates have been utilized as building blocks for multifunctional circuits that are capable of performing various logic functions under different settings of control signals. In order to effectively synthesize the polymorphic circuits, several methods have been developed in the recent years. Unfortunately, the methods are applicable for small circuits only. In this paper, we propose a SAT-based functional equivalence checking algorithm to eliminate the fitness evaluation time which is the most critical overhead for genetic programming-based design and optimization of complex polymorphic circuits. The proposed approach has led to a 30% reduction of gates with respect to the solutions created using the polymorphic multiplexing combined with the optimization conducted by the ABC tool. 

Klíčová slova

multifunction logic, logic synthesis, genetic programming

Autoři

SEKANINA, L.; VAŠÍČEK, Z.

Rok RIV

2012

Vydáno

12. 3. 2012

Nakladatel

European Design and Automation Association

Místo

Dresden

ISBN

978-1-4577-2145-8

Kniha

Proc. of the 2012 Design, Automation and Test in Europe

Strany od

715

Strany do

720

Strany počet

6

URL

https://www.fit.vut.cz/research/publication/9750/

BibTex

@inproceedings{BUT91452,
  author="Lukáš {Sekanina} and Zdeněk {Vašíček}",
  title="A SAT-based Fitness Function for Evolutionary Optimization of Polymorphic Circuits",
  booktitle="Proc. of the 2012 Design, Automation and Test in Europe",
  year="2012",
  pages="715--720",
  publisher="European Design and Automation Association",
  address="Dresden",
  doi="10.1109/DATE.2012.6176563",
  isbn="978-1-4577-2145-8",
  url="https://www.fit.vut.cz/research/publication/9750/"
}