Detail publikace

Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support

Originální název

Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support

Anglický název

Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support

Jazyk

en

Originální abstrakt

This paper addresses the modelling and validation of an evolvable hardware architecture which can be mapped on a 2D systolic structure implemented on commercial reconfigurable FPGAs. The adaptation capabilities of the architecture are exercised to validate its evolvability. The underlying proposal is the use of a library of reconfigurable components characterised by their partial bitstreams, which are used by the Evolutionary Algorithm to find a solution to a given task. Evolution of image noise filters is selected as the proof of concept application. Results show that computation speed of the resulting evolved circuit is higher than with the Virtual Reconfigurable Circuits approach, and this can be exploited on the evolution process by using dynamic reconfiguration.

Anglický abstrakt

This paper addresses the modelling and validation of an evolvable hardware architecture which can be mapped on a 2D systolic structure implemented on commercial reconfigurable FPGAs. The adaptation capabilities of the architecture are exercised to validate its evolvability. The underlying proposal is the use of a library of reconfigurable components characterised by their partial bitstreams, which are used by the Evolutionary Algorithm to find a solution to a given task. Evolution of image noise filters is selected as the proof of concept application. Results show that computation speed of the resulting evolved circuit is higher than with the Virtual Reconfigurable Circuits approach, and this can be exploited on the evolution process by using dynamic reconfiguration.

BibTex


@inproceedings{BUT76400,
  author="Ruben {Salvador} and Andres {Otero} and Javier {Mora} and Eduardo {De la Torre} and Teresa {Riesgo} and Lukáš {Sekanina}",
  title="Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support",
  annote="This paper addresses the modelling and validation of an evolvable hardware
architecture which can be mapped
on a 2D systolic structure implemented on commercial reconfigurable FPGAs. The
adaptation capabilities of the
architecture are exercised to validate its evolvability. The underlying proposal
is the use of a library of reconfigurable
components characterised by their partial bitstreams, which are used by the
Evolutionary Algorithm to find a solution
to a given task. Evolution of image noise filters is selected as the proof of
concept application. Results show that
computation speed of the resulting evolved circuit is higher than with the
Virtual Reconfigurable Circuits approach, and
this can be exploited on the evolution process by using dynamic reconfiguration.",
  address="IEEE Computer Society",
  booktitle="Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems",
  chapter="76400",
  edition="NEUVEDEN",
  howpublished="print",
  institution="IEEE Computer Society",
  year="2011",
  month="june",
  pages="184--191",
  publisher="IEEE Computer Society",
  type="conference paper"
}