Detail publikace

Design and Simulation of High Performance Parallel Architectures Using the ISAC Language

PŘIKRYL, Z. KŘOUSTEK, J. HRUŠKA, T. KOLÁŘ, D. MASAŘÍK, K. HUSÁR, A.

Originální název

Design and Simulation of High Performance Parallel Architectures Using the ISAC Language

Typ

článek v časopise - ostatní, Jost

Jazyk

angličtina

Originální abstrakt

Most of modern embedded systems for multimedia and network applications are based on parallel data stream processing. The data processing can be done using very long instruction word processors (VLIW), or using more than one high performance application-specific instruction set processor (ASIPs), or even by their combination on single chip. Design and testing of these complex systems is time-consuming and iterative process. Architecture description languages (ADLs) are one of the most effective solutions for single processor design. However, support for description of parallel architectures and multi-processor systems is very low or completely missing in nowadays ADLs. This article presents utilization of new extensions for existing architecture description language ISAC. These extensions are used for easy and fast prototyping and testing of parallel based systems and processors. This article extends the previous publication on RTES 2010 conference.

Klíčová slova

Architecture description language, ISAC, VLIW, multiprocessor system on a chip, simulation, debugging

Autoři

PŘIKRYL, Z.; KŘOUSTEK, J.; HRUŠKA, T.; KOLÁŘ, D.; MASAŘÍK, K.; HUSÁR, A.

Rok RIV

2011

Vydáno

1. 2. 2011

Nakladatel

Global Science & Technology Forum

Místo

Singapur

ISSN

2010-2283

Periodikum

GSTF International Journal on Computing

Ročník

1

Číslo

2

Stát

Singapurská republika

Strany od

97

Strany do

106

Strany počet

10

URL

http://dl4.globalstf.org/?wpsc-product=design-and-simulation-of-high-performance-parallel-architectures-using-the-isac-language

BibTex

@article{BUT76296,
  author="Zdeněk {Přikryl} and Jakub {Křoustek} and Tomáš {Hruška} and Dušan {Kolář} and Karel {Masařík} and Adam {Husár}",
  title="Design and Simulation of High Performance Parallel Architectures Using the ISAC Language",
  journal="GSTF International Journal on Computing",
  year="2011",
  volume="1",
  number="2",
  pages="97--106",
  doi="10.5176/2010-2283\{_}1.2.46",
  issn="2010-2283",
  url="http://dl4.globalstf.org/?wpsc-product=design-and-simulation-of-high-performance-parallel-architectures-using-the-isac-language"
}