Detail publikace

Accelerated Modular Arithmetic for Low-Performance Devices

MALINA, L. HAJNÝ, J.

Originální název

Accelerated Modular Arithmetic for Low-Performance Devices

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The paper deals with efficient modular arithmetic algorithms for resource restricted devices like smart-cards or sensors. The modular arithmetic is important for a wide variety of computations in these devices, from communication to signal processing. To speed up some cryptographic operations, the most widespread devices often have some cryptographic support provided by a dedicated chip. Our goal is to use the resources of a crypto-coprocessor to accelerate general modular operations. The paper describes our implementation of modular arithmetic operations with large integers, and provides the comparison of the accelerated method with three classical methods for (modular) multiplication.

Klíčová slova

Cryptography, modular arithmetic, multiplication, .NET, RSA, smart-cards.

Autoři

MALINA, L.; HAJNÝ, J.

Rok RIV

2011

Vydáno

18. 8. 2011

ISBN

978-1-4577-1411-5

Kniha

34th International Conference on Telecommunications and Signal Processing (TSP 2011)

Strany od

1

Strany do

5

Strany počet

5

BibTex

@inproceedings{BUT72986,
  author="Lukáš {Malina} and Jan {Hajný}",
  title="Accelerated Modular Arithmetic for Low-Performance Devices",
  booktitle="34th International Conference on Telecommunications and Signal Processing (TSP 2011)",
  year="2011",
  pages="1--5",
  isbn="978-1-4577-1411-5"
}