Detail publikace

Design of Arbiters and Allocators Based on Multi-Terminal BDDs

DVOŘÁK, V. MIKUŠEK, P.

Originální název

Design of Arbiters and Allocators Based on Multi-Terminal BDDs

Typ

článek v časopise - ostatní, Jost

Jazyk

angličtina

Originální abstrakt

Assigning one (more) shared resource(s) to several requesters is a function of arbiters (allocators). This class of decision-making modules can be implemented in a number of ways, from hardware to firmware to software. The paper presents a new computer-aided technique that can produce representations of arbiters/allocators in a form of a Multi-Terminal Binary Decision Diagram (MTBDD) with close to minimum cost and width. This diagram can then serve as a prototype for a cascade of multiple-output look-up tables (LUTs) that implements the given function, or for efficient firmware implementation. The technique makes use of iterative decomposition of integer functions of Boolean variables and a variable-ordering heuristic to order variables. The LUT cascades lead directly to the pipelined design, simplify wiring and testing and can compete with the traditional FPGA design in performance and with PLA design in chip area.

Klíčová slova

Multi-Terminal BDDs, LUT cascades, iterative disjunctive decomposition, arbiter circuits, allocators.

Autoři

DVOŘÁK, V.; MIKUŠEK, P.

Rok RIV

2010

Vydáno

28. 7. 2010

ISSN

0948-6968

Periodikum

Journal of Universal Computer Science

Ročník

16

Číslo

14

Stát

Rakouská republika

Strany od

1826

Strany do

1852

Strany počet

27

URL

https://www.fit.vut.cz/research/publication/9348/

BibTex

@article{BUT50516,
  author="Václav {Dvořák} and Petr {Mikušek}",
  title="Design of Arbiters and Allocators Based on Multi-Terminal BDDs",
  journal="Journal of Universal Computer Science",
  year="2010",
  volume="16",
  number="14",
  pages="1826--1852",
  issn="0948-6968",
  url="https://www.fit.vut.cz/research/publication/9348/"
}