Detail publikace

Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware

Originální název

Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware

Anglický název

Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware

Jazyk

en

Originální abstrakt

The paper addresses software and firmware implementation of multiple-output Boolean functions based on cascades of Look-Up Tables (LUTs). A LUT cascade is described as a means of compact representation of a large class of sparse Boolean functions, evaluation of which then reduces to multiple indirect memory accesses. The method is compared to a technique of direct PLA emulation and is illustrated on examples. A specialized micro-engine is proposed for even faster evaluation than is possible with universal microprocessors. The presented method is flexible in making trade-offs between performance and memory footprint and may be useful for embedded applications where the processing speed is not critical. Evaluation may run on various CPUs and DSP cores or slightly faster on FPGA-based micro-programmed controllers.

Anglický abstrakt

The paper addresses software and firmware implementation of multiple-output Boolean functions based on cascades of Look-Up Tables (LUTs). A LUT cascade is described as a means of compact representation of a large class of sparse Boolean functions, evaluation of which then reduces to multiple indirect memory accesses. The method is compared to a technique of direct PLA emulation and is illustrated on examples. A specialized micro-engine is proposed for even faster evaluation than is possible with universal microprocessors. The presented method is flexible in making trade-offs between performance and memory footprint and may be useful for embedded applications where the processing speed is not critical. Evaluation may run on various CPUs and DSP cores or slightly faster on FPGA-based micro-programmed controllers.

BibTex


@article{BUT45165,
  author="Václav {Dvořák}",
  title="Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware",
  annote="The paper addresses software and firmware implementation of multiple-output
Boolean functions based on cascades of Look-Up Tables (LUTs). A LUT cascade is
described as a means of compact representation of a large class of sparse Boolean
functions, evaluation of which then reduces to multiple indirect memory accesses.
The method is compared to a technique of direct PLA emulation and is illustrated
on examples. A specialized micro-engine is proposed for even faster evaluation
than is possible with universal microprocessors. The presented method is flexible
in making trade-offs between performance and memory footprint and may be useful
for embedded applications where the processing speed is not critical. Evaluation
may run on various CPUs and DSP cores or slightly faster on FPGA-based
micro-programmed controllers.",
  chapter="45165",
  howpublished="print",
  journal="Journal of Software",
  number="5",
  volume="2",
  year="2007",
  month="august",
  pages="52--63",
  type="journal article - other"
}