Detail publikace

Optimizations of packet classification algorithms

Originální název

Optimizations of packet classification algorithms

Anglický název

Optimizations of packet classification algorithms

Jazyk

en

Originální abstrakt

This paper deals with packet classification in computer networks. As network speeds are increasing, the demand for hardware acceleration of packet classification in FPGAs or ASICs are growing. Nowadays algorithms implemented in hardware can achieve multigigabit speeds, but they suffer with great memory overhead. A new architecture which reduces memory overhead of decomposition methods for packet classification is proposed.

Anglický abstrakt

This paper deals with packet classification in computer networks. As network speeds are increasing, the demand for hardware acceleration of packet classification in FPGAs or ASICs are growing. Nowadays algorithms implemented in hardware can achieve multigigabit speeds, but they suffer with great memory overhead. A new architecture which reduces memory overhead of decomposition methods for packet classification is proposed.

BibTex


@inproceedings{BUT34931,
  author="Viktor {Puš}",
  title="Optimizations of packet classification algorithms",
  annote="This paper deals with packet classification in computer networks. As network
speeds are increasing, the demand for hardware acceleration of packet
classification in FPGAs or ASICs are growing. Nowadays algorithms implemented in
hardware can achieve multigigabit speeds, but they suffer with great memory
overhead. A new architecture which reduces memory overhead of decomposition
methods for packet classification is proposed.",
  address="Faculty of Information Technology BUT",
  booktitle="Počítačové architektury & diagnostika 2010",
  chapter="34931",
  edition="NEUVEDEN",
  howpublished="print",
  institution="Faculty of Information Technology BUT",
  year="2010",
  month="september",
  pages="153--158",
  publisher="Faculty of Information Technology BUT",
  type="conference paper"
}