Detail publikace

MULTIPLYING DIGITAL-TO-ANALOG CONVERTER WITH 1,5 AND 2,5 BIT RESOLUTION - CASE STUDY

Originální název

MULTIPLYING DIGITAL-TO-ANALOG CONVERTER WITH 1,5 AND 2,5 BIT RESOLUTION - CASE STUDY

Anglický název

MULTIPLYING DIGITAL-TO-ANALOG CONVERTER WITH 1,5 AND 2,5 BIT RESOLUTION - CASE STUDY

Jazyk

en

Originální abstrakt

The paper deals with design of the most important stage in pipelined analog-to-digital converter (ADC) so-called multiplying digital-to-analog converter (MDAC). The MDAC with 1,5 and 2,5 bit of resolution were designed using CMOS 07 technology. The both types of MDAC were compared and the results are also presented. All stages were proposed utilizing Cadence design software.

Anglický abstrakt

The paper deals with design of the most important stage in pipelined analog-to-digital converter (ADC) so-called multiplying digital-to-analog converter (MDAC). The MDAC with 1,5 and 2,5 bit of resolution were designed using CMOS 07 technology. The both types of MDAC were compared and the results are also presented. All stages were proposed utilizing Cadence design software.

BibTex


@inproceedings{BUT32416,
  author="Jiří {Háze} and Vilém {Kledrowetz}",
  title="MULTIPLYING DIGITAL-TO-ANALOG CONVERTER WITH 1,5 AND 2,5 BIT RESOLUTION - CASE STUDY",
  annote="The paper deals with design of the most important stage in pipelined analog-to-digital converter (ADC) so-called multiplying digital-to-analog converter (MDAC). The MDAC with 1,5 and 2,5 bit of resolution were designed using CMOS 07 technology. The both types of MDAC were compared and the results are also presented. All stages were proposed utilizing Cadence design software.",
  address="IMAPS CZ/SK",
  booktitle="Proceedings on 15th International EDS Conference 2008",
  chapter="32416",
  howpublished="print",
  institution="IMAPS CZ/SK",
  year="2009",
  month="september",
  pages="326--332",
  publisher="IMAPS CZ/SK",
  type="conference paper"
}