Detail publikace
LUT Cascade-Based Implementations of Allocators
DVOŘÁK, V. MIKUŠEK, P.
Originální název
LUT Cascade-Based Implementations of Allocators
Anglický název
LUT Cascade-Based Implementations of Allocators
Jazyk
en
Originální abstrakt
This paper presents a new technique for iterative decomposition of multiple-output Boolean functions with an embedded heuristics to order variables. The algorithm produces a cascade of LUTs that implements the given function and simultaneously constructs a sub-optimal Multi-Terminal Binary Decision Diagram (MTBDD). The LUT cascade can be used for pipelined processing on FPGAs or at a non-traditional synthesis of large combinational and sequential circuits. On the other hand, suboptimal MTBBDs can serve as prototypes for efficient firmware implementation, especially when a micro-programmed controller that firmware runs on supports multi-way branching. A novel technique is illustrated on a practical example of the m x n wavefront allocator (m = n = 4, 20 inputs, 16 outputs). It may be quite useful as a more flexible alternative implementation of digital systems with increased testability and improved manufacturability.
Anglický abstrakt
This paper presents a new technique for iterative decomposition of multiple-output Boolean functions with an embedded heuristics to order variables. The algorithm produces a cascade of LUTs that implements the given function and simultaneously constructs a sub-optimal Multi-Terminal Binary Decision Diagram (MTBDD). The LUT cascade can be used for pipelined processing on FPGAs or at a non-traditional synthesis of large combinational and sequential circuits. On the other hand, suboptimal MTBBDs can serve as prototypes for efficient firmware implementation, especially when a micro-programmed controller that firmware runs on supports multi-way branching. A novel technique is illustrated on a practical example of the m x n wavefront allocator (m = n = 4, 20 inputs, 16 outputs). It may be quite useful as a more flexible alternative implementation of digital systems with increased testability and improved manufacturability.
Dokumenty
BibTex
@inproceedings{BUT30717,
author="Václav {Dvořák} and Petr {Mikušek}",
title="LUT Cascade-Based Implementations of Allocators",
annote="This paper presents a new technique for iterative decomposition of
multiple-output Boolean functions with an embedded heuristics to order variables.
The algorithm produces a cascade of LUTs that implements the given function and
simultaneously constructs a sub-optimal Multi-Terminal Binary Decision Diagram
(MTBDD). The LUT cascade can be used for pipelined processing on FPGAs or at
a non-traditional synthesis of large combinational and sequential circuits. On
the other hand, suboptimal MTBBDs can serve as prototypes for efficient firmware
implementation, especially when a micro-programmed controller that firmware runs
on supports multi-way branching. A novel technique is illustrated on a practical
example of the m x n wavefront allocator (m = n = 4, 20 inputs, 16 outputs). It
may be quite useful as a more flexible alternative implementation of digital
systems with increased testability and improved manufacturability.",
address="IEEE Computer Society",
booktitle="Proc. of the 25th Convention of EEE in Israel",
chapter="30717",
edition="NEUVEDEN",
howpublished="print",
institution="IEEE Computer Society",
year="2008",
month="december",
pages="85--89",
publisher="IEEE Computer Society",
type="conference paper"
}