Detail publikace

Design and Implementation of the Memory Scheduler for the FPGA - Based Router

MAREK, T., CRHA, L., NOVOTNÝ, M.

Originální název

Design and Implementation of the Memory Scheduler for the FPGA - Based Router

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

This paper deals with a design of a memory scheduler as a part of the Liberouter project.

Klíčová slova

FPGA, DDR SDRAM, memory, router, IPV6

Autoři

MAREK, T., CRHA, L., NOVOTNÝ, M.

Rok RIV

2004

Vydáno

1. 9. 2004

Nakladatel

Springer Verlag

Místo

Leuven

ISBN

3-540-22989-2

Kniha

Proc. of the Field Programmable Logic and Application 2004

Strany od

1133

Strany do

1139

Strany počet

6

BibTex

@inproceedings{BUT17581,
  author="Tomáš {Marek} and Luděk {Bryan} and Martin {Novotný}",
  title="Design and Implementation of the Memory Scheduler for the FPGA - Based Router",
  booktitle="Proc. of the Field Programmable Logic and Application 2004",
  year="2004",
  pages="1133--1139",
  publisher="Springer Verlag",
  address="Leuven",
  isbn="3-540-22989-2"
}