Detail publikace

Automation and Optimization of Coverage-driven Verification

Originální název

Automation and Optimization of Coverage-driven Verification

Anglický název

Automation and Optimization of Coverage-driven Verification

Jazyk

en

Originální abstrakt

This paper proposes a new method for automation and optimization of coverage-driven verification (CDV) of hardware systems that is based on evolutionary computing. In comparison with the standard CDV that utilizes random search, using this method, the convergence to the maximum coverage is much faster, fewer input stimuli are used and no manual effort is required from the user. Moreover, the optimization is targeted to the verification process itself without the dependence on the circuit that is verified. For the demonstration purposes, the sequential arithmetic-logic unit (ALU) and the RISC processor were verified and the results show that using the optimization method, a significant improvement can be achieved.

Anglický abstrakt

This paper proposes a new method for automation and optimization of coverage-driven verification (CDV) of hardware systems that is based on evolutionary computing. In comparison with the standard CDV that utilizes random search, using this method, the convergence to the maximum coverage is much faster, fewer input stimuli are used and no manual effort is required from the user. Moreover, the optimization is targeted to the verification process itself without the dependence on the circuit that is verified. For the demonstration purposes, the sequential arithmetic-logic unit (ALU) and the RISC processor were verified and the results show that using the optimization method, a significant improvement can be achieved.

BibTex


@inproceedings{BUT119894,
  author="Marcela {Zachariášová} and Zdeněk {Kotásek}",
  title="Automation and Optimization of Coverage-driven Verification",
  annote="
This paper proposes a new method for automation 
and optimization of coverage-driven verification (CDV) of 
hardware systems that is based on evolutionary computing. In 
comparison with the standard CDV that utilizes random search, 
using this method, the convergence to the maximum coverage 
is much faster, fewer input stimuli are used and no manual 
effort is required from the user. Moreover, the optimization is 
targeted to the verification process itself without the dependence 
on the circuit that is verified. For the demonstration purposes, the 
sequential arithmetic-logic unit (ALU) and the RISC processor 
were verified and the results show that using the optimization 
method, a significant improvement can be achieved.",
  address="IEEE Computer Society",
  booktitle="Proceedings of the 18th Euromicro Conference on Digital Systems Design",
  chapter="119894",
  doi="10.1109/DSD.2015.34",
  edition="NEUVEDEN",
  howpublished="electronic, physical medium",
  institution="IEEE Computer Society",
  year="2015",
  month="august",
  pages="87--94",
  publisher="IEEE Computer Society",
  type="conference paper"
}