Detail publikace

A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP

GROCHOL, D. SEKANINA, L. ŽÁDNÍK, M. KOŘENEK, J.

Originální název

A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

This paper deals with design of an application protocol classifier intended for high speed networks operating at 100 Gbps. Because a very low latency is the main design constraint, the classifier is constructed as a combinational circuit in a field programmable gate array. The classification is performed using the first packet carrying the application payload. In order to further reduce the latency, the circuit is optimized by Cartesian genetic programming. Using a real network data, we demonstrated viability of our approach in task of a very fast classification of three application protocols (HTTP, SMTP, SSH).

Klíčová slova

computer network, cartesian genetic programming, classifier, FPGA

Autoři

GROCHOL, D.; SEKANINA, L.; ŽÁDNÍK, M.; KOŘENEK, J.

Rok RIV

2015

Vydáno

29. 3. 2015

Nakladatel

Springer International Publishing

Místo

Berlin

ISBN

978-3-319-16548-6

Kniha

Applications of Evolutionary Computation, 18th European Conference

Edice

Lecture Notes in Computer Science

Strany od

67

Strany do

78

Strany počet

12

URL

https://www.fit.vut.cz/research/publication/10772/

BibTex

@inproceedings{BUT119801,
  author="David {Grochol} and Lukáš {Sekanina} and Martin {Žádník} and Jan {Kořenek}",
  title="A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP",
  booktitle="Applications of Evolutionary Computation, 18th European Conference",
  year="2015",
  series="Lecture Notes in Computer Science",
  volume="9028",
  pages="67--78",
  publisher="Springer International Publishing",
  address="Berlin",
  doi="10.1007/978-3-319-16549-3\{_}6",
  isbn="978-3-319-16548-6",
  url="https://www.fit.vut.cz/research/publication/10772/"
}