Detail publikace

Reduction of the transistor mismaches effects in SI circuits

PROKOP, R., MUSIL, V., STEHLÍK, J.

Originální název

Reduction of the transistor mismaches effects in SI circuits

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The switched current (SI) circuits with reduced effect of transistor mismatches are introduced. Elimination of this phenomenon is achieved by a modification of an already known SI basic unit-delay cell, in such a way that the number of required current mirror circuits is reduced. These cells can be used as a building block of any arbitrary sampled-data transfer function. As an example, a SI bilinear integrator circuit was designed.

Klíčová slova

switched current circuit, transistor mismatching

Autoři

PROKOP, R., MUSIL, V., STEHLÍK, J.

Rok RIV

2004

Vydáno

14. 9. 2004

Nakladatel

Zd. Novotný

Místo

Chania

ISBN

80-214-2819-8

Kniha

Proceedings of the Socrates Workshop 2004

Strany od

145

Strany do

149

Strany počet

5

BibTex

@inproceedings{BUT11863,
  author="Roman {Prokop} and Vladislav {Musil} and Jiří {Stehlík}",
  title="Reduction of the transistor mismaches effects in SI circuits",
  booktitle="Proceedings of the Socrates Workshop 2004",
  year="2004",
  pages="5",
  publisher="Zd. Novotný",
  address="Chania",
  isbn="80-214-2819-8"
}