Detail publikace
New Methods for Increasing Efficiency and Speed of Functional Verification
ZACHARIÁŠOVÁ, M.
Originální název
New Methods for Increasing Efficiency and Speed of Functional Verification
Anglický název
New Methods for Increasing Efficiency and Speed of Functional Verification
Jazyk
en
Originální abstrakt
This paper describes one approach for verification of hardware systems called functional verification. Several challenges and problems connected with efficiency and speed of functional verification are identified and reflected in the goals of the Ph.D. thesis. The first goal deals with creation of a complete coverage model of the verified system depending on the measurable attributes of a circuit. The second one aims at finding new methods how to check specific values of such attributes as fast as possible and to increase the overall efficiency of functional verification.
Anglický abstrakt
This paper describes one approach for verification of hardware systems called functional verification. Several challenges and problems connected with efficiency and speed of functional verification are identified and reflected in the goals of the Ph.D. thesis. The first goal deals with creation of a complete coverage model of the verified system depending on the measurable attributes of a circuit. The second one aims at finding new methods how to check specific values of such attributes as fast as possible and to increase the overall efficiency of functional verification.
Dokumenty
BibTex
@inproceedings{BUT103591,
author="Marcela {Zachariášová}",
title="New Methods for Increasing Efficiency and Speed of Functional Verification",
annote="This paper describes one approach for verification of hardware systems called
functional verification. Several challenges and problems connected with
efficiency and speed of functional verification are identified and reflected in
the goals of the Ph.D. thesis. The first goal deals with creation of a complete
coverage model of the verified system depending on the measurable attributes of
a circuit. The second one aims at finding new methods how to check specific
values of such attributes as fast as possible and to increase the overall
efficiency of functional verification.",
address="University of West Bohemia in Pilsen",
booktitle="Počítačové architektury a diagnostika PAD 2013",
chapter="103591",
edition="NEUVEDEN",
howpublished="print",
institution="University of West Bohemia in Pilsen",
year="2013",
month="september",
pages="111--116",
publisher="University of West Bohemia in Pilsen",
type="conference paper"
}