Detail publikace

Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA

Originální název

Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA

Anglický název

Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA

Jazyk

en

Originální abstrakt

This paper presents the methods of design synchronization after the partial dynamic reconfiguration of FPGA and introduces a new method inspired from previous one which is still used. The implementation of this method on TMR fault tolerant system component is described. Results of synchronization after reconfiguration process in Xilinx FPGA are presented.

Anglický abstrakt

This paper presents the methods of design synchronization after the partial dynamic reconfiguration of FPGA and introduces a new method inspired from previous one which is still used. The implementation of this method on TMR fault tolerant system component is described. Results of synchronization after reconfiguration process in Xilinx FPGA are presented.

BibTex


@inproceedings{BUT103517,
  author="Lukáš {Mičulka} and Zdeněk {Kotásek}",
  title="Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA",
  annote="This paper presents the methods of design synchronization after the partial
dynamic reconfiguration of FPGA and introduces a new method inspired from
previous one which is still used. The implementation of this method on TMR fault
tolerant system component is described. Results of synchronization after
reconfiguration process in Xilinx FPGA are presented.",
  address="Politecnico di Milano",
  booktitle="The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2013)",
  chapter="103517",
  edition="NEUVEDEN",
  howpublished="print",
  institution="Politecnico di Milano",
  year="2013",
  month="march",
  pages="53--56",
  publisher="Politecnico di Milano",
  type="conference paper"
}