Course detail

Advanced Digital Systems

FIT-PCSAcad. year: 2017/2018

Combinatorial and sequential logic design techniques, algorithms, and tools review.
Review of digital design target technologies (ASIC, FPGA). Algorithms for minimization of digital circuits. Advanced synthesis techniques (pipelining, retiming). Constraint conditions. Modern approaches to synthesis of digital circuits (models, methods, logic optimization, optimization for target technology). Synergy of modern syntehesis and verification. Low power design methodologies. Reconfigurable computing. Verification of digital circuits (OVM methodology).

Learning outcomes of the course unit

The students are able to design complex constrained digital systems using contemporary design techniques and they know modern methods for synthesis and verification of these systems.

Prerequisites

Digital system design, basic programming skills.

Co-requisites

Not applicable.

Recommended optional programme components

Not applicable.

Recommended or required reading

  • Přednáškové materiály v elektronické formě

  • Gajsky D., Dutt N., Wu A., Lin S.: High-Level Synthesis: Introduction to Chip and System Design, ISBN 079239194-2, 1992
  • Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008
  • Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996

Planned learning activities and teaching methods

Not applicable.

Assesment methods and criteria linked to learning outcomes

Study evaluation is based on marks obtained for specified items. Minimimum number of marks to pass is 50.

Requirements for class accreditation are not defined.

Language of instruction

Czech

Work placements

Not applicable.

Course curriculum

    Syllabus of lectures:
    • Combinatorial and sequential logic design techniques, algorithms, and tools review.
    • Review of digital design target technologies (ASIC, FPGA).
    • Algorithms for minimization of digital circuits.
    • Advanced synthesis techniques (pipelining, retiming).
    • Constraint conditions.
    • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
    • Modern synthesis of digital circuits (logic optimization).
    • Modern synthesis of digital circuits (optimization for target technology).
    • Synergy between synthesis and verification of digital circuits.
    • Low power design methodologies.
    • Reconfigurable computing.
    • Verification of digital circuits (OVM methodology).

    Syllabus of computer exercises:
    • Synthesis of the basic logic circuits, pipelining, retiming.
    • Constraint conditions.
    • Synthesis of basic digital circuits using ABC tool.
    • Synthesis of advanced digital circuits using ABC tool.
    • Verification of digital circuits.

    Syllabus - others, projects and individual work of students:
    • Individual project focused on digital design using CatapultC environment.

Aims

To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.

Specification of controlled education, way of implementation and compensation for absences

Written mid-term exam and project in due dates.

Classification of course in study plans

  • Programme IT-MGR-2 Master's

    branch MBI , any year of study, winter semester, 5 credits, compulsory-optional
    branch MGM , any year of study, winter semester, 5 credits, compulsory-optional
    branch MSK , any year of study, winter semester, 5 credits, elective
    branch MIS , any year of study, winter semester, 5 credits, elective
    branch MBS , any year of study, winter semester, 5 credits, elective
    branch MIN , any year of study, winter semester, 5 credits, elective
    branch MMM , any year of study, winter semester, 5 credits, elective
    branch MPV , 2. year of study, winter semester, 5 credits, compulsory

Type of course unit

 

Lecture

26 hours, optionally

Teacher / Lecturer

Syllabus


  • Combinatorial and sequential logic design techniques, algorithms, and tools review.
  • Review of digital design target technologies (ASIC, FPGA).
  • Algorithms for minimization of digital circuits.
  • Advanced synthesis techniques (pipelining, retiming).
  • Constraint conditions.
  • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
  • Modern synthesis of digital circuits (logic optimization).
  • Modern synthesis of digital circuits (optimization for target technology).
  • Synergy between synthesis and verification of digital circuits.
  • Low power design methodologies.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology).

Exercise in computer lab

10 hours, optionally

Teacher / Lecturer

Syllabus


  • Synthesis of the basic logic circuits, pipelining, retiming.
  • Constraint conditions.
  • Synthesis of basic digital circuits using ABC tool.
  • Synthesis of advanced digital circuits using ABC tool.
  • Verification of digital circuits.

Project

16 hours, optionally

Teacher / Lecturer