Course detail

Processor Architecture

FIT-ACHAcad. year: 2016/2017

Not applicable.

Language of instruction

Czech

Number of ECTS credits

5

Mode of study

Not applicable.

Learning outcomes of the course unit

Not applicable.

Prerequisites

Not applicable.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Not applicable.

Assesment methods and criteria linked to learning outcomes

Not applicable.

Course curriculum

Not applicable.

Work placements

Not applicable.

Aims

Not applicable.

Specification of controlled education, way of implementation and compensation for absences

Not applicable.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

  • Baer, J.L.: Microprocessor Architecture. Cambridge University Press, 2010, 367 s., ISBN 978-0-521-76992-1.
  • Hennessy, J.L., Patterson, D.A.: Computer Architecture - A Quantitative Approach. 5. vydání, Morgan Kaufman Publishers, Inc., 2012, 1136 s., ISBN 1-55860-596-7. 
  • Kirk, D., and Hwu, W.: Programming Massively Parallel Processors: A Hands-on Approach, Elsevier, 2010, s. 256, ISBN: 978-0-12-381472-2
  • Jeffers, J., and Reinders, J.: Intel Xeon Phi Coprocessor High Performance Programming, 2013, Morgan Kaufmann, p. 432), ISBN: 978-0-124-10414-3

Classification of course in study plans

  • Programme IT-MGR-2 Master's

    branch MBI , any year of study, winter semester, elective
    branch MIS , any year of study, winter semester, elective
    branch MBS , any year of study, winter semester, compulsory-optional
    branch MIN , any year of study, winter semester, elective
    branch MMM , any year of study, winter semester, elective
    branch MPV , 2. year of study, winter semester, compulsory
    branch MGM , 2. year of study, winter semester, elective
    branch MSK , 2. year of study, winter semester, compulsory-optional